Bias current generating circuit

一种偏置电流、产生电路的技术，应用在电气元件、电子开关、调节电变量等方向，能够解决不能提供输出电流、影响电子电路或电子系统稳定性等问题，达到提高精度、稳定性能的效果

Active Publication Date: 2014-04-16
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] The bias current generated by the circuit in the prior art is sensitive to temperature changes and cannot provide accurate output current, which may affect the stability of the electronic circuit or electronic system

Method used

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Examples

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Embodiment Construction

[0041] In order to make the purpose, features and effects of the present invention more obvious and understandable, the specific implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0042] Many specific details are set forth in the following description to facilitate a full understanding of the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0043] The bias current generation circuit provided by this embodiment, such as figure 2 As shown, it includes a loop unit 100, an output unit 200, an amplification unit 300, a resistance unit 400, a self-bias current unit 500, and a power supply unit ( figure 2 not shown).

[0044] The loop unit 100 includes a first PMOS transistor 101 and a second PMOS transistor 102 constituting a first current mirror structure...

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Abstract

The invention relates to a bias current generating circuit which comprises a loop unit, an output unit and an amplifying unit. The loop unit comprises a first PMOS pipe, a second PMOS pipe, a first NMOS pipe and a second NMOS pipe, wherein a first current mirror structure is formed by the first PMOS pipe and the second PMOS pipe, a second current mirror structure is formed by the first NMOS pipe and the second NMOS pipe, and the first NMOS pipe and the second NMOS pipe are operated in a sub-threshold value zone; the output unit is used for outputting a bias current; the amplifying unit comprises the first input end and the output end, the first input end is connected to a source electrode of the first NMOS pipe or a source electrode of the second NMOS pipe, the output end is respectively connected to a grid electrode of the first PMOS pipe and a grid electrode of the second PMOS pipe. According to the technical scheme, the influence on the output of the bias current generating circuit by the temperature can be reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a bias current generating circuit. Background technique [0002] In recent years, with the wide application of electronic products, the requirements for circuit stability are getting higher and higher. In various electronic circuits or electronic systems, circuits such as a digital-to-analog conversion circuit (ADC), a phase-locked loop circuit (PPL), and a memory circuit (memory) need to be provided with a bias current. [0003] Bias current plays a vital role in every electronic circuit or electronic system. A bias current generating circuit in the prior art such as figure 1 shown, including: [0004] PMOS transistor P10 and PMOS transistor P11 forming a current mirror structure; [0005] PMOS transistor P11 and PMOS transistor P12 forming a current mirror structure; [0006] The NMOS transistor N10 and the NMOS transistor N11 forming the current mirror structu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/46
CPCG05F3/245G05F3/26H03K17/145G05F3/16G05F3/262
Inventor 徐光磊
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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