Integrated circuit layout method based on best fit heuristic sequence and organizational evolutionary algorithms

Abstract

The invention discloses an integrated circuit layout method based on a best fit heuristic sequence and organizational evolutionary algorithms, and belongs to the technical field of physical design layout planning. The best fit heuristic sequence is utilized for carrying out encoding and decoding, is combined with the organizational evolutionary algorithms and is used for solving the super-large-scale integrated circuit layout. The integrated circuit layout method is characterized in that firstly, units are initialized, secondly, the best fit heuristic sequence is utilized for carrying out encoding and decoding on the units, and lastly, the organization is optimized through the designed split operator, the designed annexation operator and the designed training operator. The verification result shows that one important aspect of evaluating the effectiveness of solving the super-large-scale integrated circuit layout of the method is the optimal chip area utilization rate solving, and the integrated circuit layout method has the advantages that the integrated circuit layout method is an effective method for solving the super-large-scale integrated circuit layout problem and can be expanded to solve the multi-goal super-large-scale integrated circuit layout problem.

Description

Technical field [0001] The invention relates to a method for physical design layout planning, in particular to an integrated circuit layout method based on Best Fit Heuristic Sequence (BFHS) and Organizational Evolutionary Algorithms (OEA). Background technique [0002] Floorplanning is a key link in the physical design of very large scale integration (VLSI), and its results have an important impact on the size of the final chip and the global interconnect structure. With the rapid development of technology, the complexity of chip design has grown rapidly, and the requirements for chip size and internal interconnection performance have become higher and higher, which makes the role of layout planning particularly important. For the layout planning problem, many scholars have proposed a variety of algorithms using different mathematical tools, including minimum segmentation algorithms, hierarchical design methods, analytical algorithms, and stochastic optimization algorithms. The...

AI Technical Summary

Problems solved by technology

[0004] All of these methods are one-way layout methods. In the layout process, the layout is only faced to the module sequence, and the feedback information of the already placed modules is rarely used to provide effective heuristic guidance for the modules to be placed. This makes the layout The graph efficiency is not high, and the calculation time increases exponentially with the layout scale

Their treatment of soft rectangular modules is also very rough. They just randomly select several candidate modules to replace soft rectangular modules, and then make layout according to the layout method of hard modules. Discrete points, which destroy the arbitrariness and continuity of the shape change of the soft rectangular module, do not match the actual situation

Images