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A multi-channel serial adaptive bit error testing device and testing method thereof

A bit error test and self-adaptive technology, which is applied in the field of multi-channel serial self-adaptive bit error test devices, can solve the problem that the internal logic resources cannot meet the doubled growth, etc., and achieves simple and convenient scalability, easy implementation, and circuit design. Simple effects with modifications

Active Publication Date: 2016-11-30
SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0007] General error testing devices only receive data from one channel for real-time comparison. If multi-channel data reception or real-time comparison of bit errors is required, it can be achieved by increasing the number of bit error testing devices. When the code test device is testing multi-channel received data, its internal logic resources cannot meet the exponentially increasing demand

Method used

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  • A multi-channel serial adaptive bit error testing device and testing method thereof
  • A multi-channel serial adaptive bit error testing device and testing method thereof
  • A multi-channel serial adaptive bit error testing device and testing method thereof

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Embodiment Construction

[0034] Referring to the accompanying drawings showing embodiments of the invention, the invention will be described in more detail below. However, the present invention may be realized in different forms, specifications, etc., and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are presented so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to others skilled in the art. In the drawings, relative sizes may be exaggerated or reduced for clarity.

[0035] first reference figure 1 Describe in detail the multi-channel serial adaptive bit error testing device 100 that the present invention implements, this testing device comprises interface circuit module 101, FPGA module 102, control interface module 103, control module 105 and output display module 104, and this FPGA module 102 is respectively Connect interface circuit module 101 and control interface module 103, this FP...

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Abstract

The invention discloses a multi-channel serial adaptive bit error testing device, which comprises an FPGA module, an interface circuit module, a control interface module, an output display module and a control module. The FPGA module includes a pseudo-random code generation module and a multi-channel serial An adaptive bit error comparison module, the FPGA module is respectively connected to the interface circuit module, the control interface circuit module and the output display module, and the control module is connected to the control interface module; wherein, the pseudo-random code generation module generates multiple pseudo-random codes through the interface The circuit module is sent to the external communication link connected to it for testing. The multi-channel serial adaptive error comparison module receives the pseudo-random code signal, and performs pseudo-random codebook comparison on the received data, and outputs the display module Output the comparison result. The self-adaptive bit error testing device has a simple structure, is easy to implement, can perform multi-channel real-time bit error comparison and is not limited by FPGA internal storage resources and cache resources, and has good scalability and versatility.

Description

technical field [0001] The invention relates to the field of digital communication system error testing equipment, in particular to a simple and feasible solution for satellite data transmission link testing, which is a miniaturized multi-channel serial adaptive error testing device and its testing method . Background technique [0002] The bit error test device is a detection device for the bit error rate of the digital communication system. Its main function is to provide the test code source for the transmission of the digital link, receive the downlink data of the digital link and compare it with the test codebook, and display the system error in real time. code situation. Bit error testing is an essential item in the debugging or testing process of digital communication systems. At present, general bit error testing devices require multiple devices such as independent code source generators, data terminal acquisition equipment and controllers, and complex comparisons. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/24
Inventor 江洁钟鸣陈丽仙
Owner SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM
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