Method and device for processing memory access instructions by 64-bit virtual machine

Abstract

An embodiment of the invention provides a method and a device for a 64-bit virtual machine to process a memory-reference instrument and relates to the technical field of computers. The problem of the whole program performance loss is solved. The method comprises the steps of obtaining the memory-reference instrument; confirming a low-order address of an accessed target address indicated by the memory-reference instrument according to the memory-reference instrument; generating a first assembly instruction and a second assembly instruction according to the low-order address of the target address to load the low-order address to a first register through the first assembly instruction and the second assembly instruction; generating a third assembly instruction according to the memory-reference instrument, wherein the third assembly instruction is used for accessing and memorizing the low-order address stored in the first register and a high-order address stored in a second register, the target address is superposed, and the high-order address is a global high-order address of a program. The method and the device for the 64-bit virtual machine to process the memory-reference instrument are used for instant compiling in the 64-bit virtual machine.

Description

technical field [0001] Embodiments of the present invention relate to computer technology, and in particular to a method and device for processing memory access instructions by a 64-bit virtual machine. Background technique [0002] In the prior art, when a 64-bit Java virtual machine processes a memory access instruction, it first determines the target address indicated by the memory access instruction, and analyzes the target address, and then compiles an efficient instruction sequence according to the characteristics of the target address, Therefore, the lengths of memory access instruction sequences generated for different address values ​​are different. When the length is high, even 7 instructions can complete a memory access operation. [0003] The above method is relatively time-consuming in address analysis. For just-in-time compilation, the process of address analysis will be a frequent operation, which will bring performance impact to the compilation process. In ad...

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Problems solved by technology

[0003] The above method is relatively time-consuming in address analysis. For just-in-time compilation, the process of address analysis will be a frequent operation, which will bring performance impact to the compilation process. In addition, for the Java virtual machine, which dynamically generates and executes code The program, when generating memory access code, may not be able to determine the value of the target address, the address may be modified after the code is generated, because the corresponding code must be known only after the value of the target address, and because The variable length of the instruction sequence will increase the complexity of the address refill process and bring performance loss to the entire program

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