Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A Parallel Block Decoding Method for LTE Turbo Codes with Low Path Delay

A low-path, decoding technology, applied in digital transmission systems, electrical components, error prevention, etc., can solve problems such as increased path delay, increased path delay of address calculation units, etc., to reduce path delay and storage resource consumption. Small, avoid the effect of information transmission

Inactive Publication Date: 2017-06-13
XIDIAN UNIV
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since n iteration units do not work at the same time in one clock cycle, the last iteration unit will not start to calculate until the first n-1 iteration units have been processed, so that as the number of blocks increases, the address calculation The path delay of the unit will also increase accordingly
Since the address calculation unit is the key unit of the interleaver, the path delay of the address calculation unit causes the path delay of the parallel block decoding of the entire LTETurbo code to increase

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A Parallel Block Decoding Method for LTE Turbo Codes with Low Path Delay
  • A Parallel Block Decoding Method for LTE Turbo Codes with Low Path Delay
  • A Parallel Block Decoding Method for LTE Turbo Codes with Low Path Delay

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0038]The technical method of the present invention will be further described below through the accompanying drawings and embodiments.

[0039] refer to figure 1 and figure 2 , the specific implementation steps of the present invention are as follows:

[0040] Step 1: Demultiplex the information stream input into the decoder.

[0041] In this embodiment, the Turbo code with a code rate of 1 / 3 is taken as an example. First, the decoder detects whether there is data input. When it detects that there is data input, the input information stream is demultiplexed, and three The information flows are respectively: a systematic bit information flow a, a first check bit information flow b, and a second check bit information flow c.

[0042] Step 2: Store the three demultiplexed information streams in RAM respectively.

[0043] Using the assistance of the finite state machine, store the three information streams after demultiplexing in the RAM respectively, that is, store the syste...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an LTE Turbo code parallel block decoding method with low path delay. The LTE Turbo code parallel block decoding method with low path delay mainly solves the problem of a traditional LTE Turbo code parallel block decoding method that path delay is large during the interleave process. The LTE Turbo code parallel block decoding method with low path delay comprises the implementation steps that (1) information flow after demultiplexing is transmitted into a soft input and soft output encoder; (2) each code block in output information flow is divided into n iteration units, and address interleave is conducted on the iteration units; (3) initial addresses of the iteration units are precomputed, and the initial addresses are used for calculating interleave addresses of all the iteration units; (4) information after interleave is fed back to the soft input and soft output encoder, and primary iteration and secondary iteration are conducted on a feedback signal in sequence; (5) de-interleave is conducted on a result after secondary iteration, and a de-interleave result is coded and output after being judged. The LTE Turbo code parallel block decoding method with low path delay reduces path delay and storage resource consumption, and can be applied to an LTE system.

Description

technical field [0001] The invention belongs to the field of wireless communication, relates to a parallel block decoding method of an LTE Turbo code, and can be used in a long-term evolution LTE system. Background technique [0002] In recent years, the high-speed FPGA implementation of Turbo decoding based on the LTE standard has attracted widespread attention. With the continuous improvement of the communication transmission rate, the traditional serial decoding can no longer meet the requirements of the system throughput, and the parallel decoding algorithm has attracted more and more attention in the engineering field. One of the key technologies of decoding. The quadratic permutation polynomial interleaver QPP is widely used in 3GPP LTE Turbo codes due to its advantages of "no conflict" parallel memory access. Scholars and technicians in the industry have been making unremitting efforts to find a way to ensure that the throughput rate of parallel decoding remains unch...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00
Inventor 宫丰奎刘铭殷实王勇张南
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products