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Flat pin-free packaging body

A flat leadless, packaged body technology, applied in the direction of electric solid devices, semiconductor devices, semiconductor/solid device components, etc., to avoid the limitations of the base process and ensure the quality of the effect

Inactive Publication Date: 2014-11-19
SUZHOU ASEN SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This poses new challenges for the packaging of integrated circuits, mainly because the existing base manufacturing process is difficult to meet the needs of this miniaturization

Method used

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  • Flat pin-free packaging body
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Experimental program
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Embodiment Construction

[0013] In order to better understand the spirit of the present invention, it will be further described below in conjunction with some preferred embodiments of the present invention.

[0014] For chips with a small size such as less than 2mm×2mm, limited by the existing pedestal technology, a package without a pedestal can be used. That is, the chip is mounted directly on the pins. However, due to considerations of multiple design factors, sometimes the chip cannot be located in the center of the entire package but is biased to one side. In this way, according to the symmetrical arrangement of pins designed according to traditional design rules, there may be a situation where a row of pins cannot touch the chip, and a large area of ​​the corresponding chip will be suspended. Due to the large area of ​​the chip suspended in the air, during the wire bonding operation, the chip cannot be bonded due to the unstable loading of the chip.

[0015] Embodiments of the present inventio...

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Abstract

The invention relates to a flat pin-free packaging body. According to one embodiment of the invention, the flat pin-free packaging body is provided with a first side and a second side which are opposite and comprises a chip, an injection molding housing which shields the chip, and a plurality of pins arranged at the first side and the second side. Each of the plurality of pins comprises an inner pin portion which is shielded in the injection molding housing and an outer pin portion whose bottom surface is exposed outside the injection molding housing. The inner pin portions of at least two of the plurality of pins have different planar dimensions, and the chip is at least directly installed on the one whose inner pin portion has larger dimensions without the base. According to the invention, a symmetrical pin design is changed to an asymmetric design, such that under the condition that the chip is free from the base and is biased, it can still be ensured that the chip can get sufficient support from the pins and is not obviously suspended, thus on one hand, the quality of the packaging body is guaranteed, and on the other hand, restrictions on a base process are avoided at the same time.

Description

technical field [0001] The invention relates to an integrated circuit package, especially a flat no-lead package (QFN, Quad Flat No-lead Package). Background technique [0002] A typical integrated circuit package usually connects the chip to the pins through the base. For flat no-lead packages, the chip can be mounted on the base using a chip back film or adhesive process, and then the chip can be connected to the corresponding pins using a wire bonding process. [0003] However, with the development of electronic technology, the industry expects the chip size to be smaller and smaller to adapt to the trend of product miniaturization. This poses a new challenge for the packaging of integrated circuits, mainly because the existing base manufacturing process is difficult to meet the demand for miniaturization. Therefore, the existing packaging process needs to be further improved to meet the packaging requirements of small-sized chips. Contents of the invention [0004] ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/495
CPCH01L2924/181
Inventor 郭桂冠
Owner SUZHOU ASEN SEMICON CO LTD
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