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FPGA-based process layer message filtering and bandwidth control method

A message filtering and bandwidth control technology, applied in digital transmission systems, electrical components, transmission systems, etc., can solve the problems of process layer network impact, device paralysis, etc., and achieve the effect of flexible functions, high integration, and reduced transmission load.

Active Publication Date: 2017-05-03
NARI TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Moreover, when substation incidents occur intensively, the process layer network needs to bear a large burst of traffic, and when a certain device on the process layer is abnormal, a large number of messages or a large number of external disturbance messages will have an impact on the process layer network, and even Causes devices on the network to crash

Method used

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  • FPGA-based process layer message filtering and bandwidth control method
  • FPGA-based process layer message filtering and bandwidth control method
  • FPGA-based process layer message filtering and bandwidth control method

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Embodiment Construction

[0028] The present invention will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.

[0029] according to figure 1 , after the process layer network is established, the multicast address of the Internet message is relatively stable, and the specified multicast address is filtered to reduce the actual number of messages that the processor needs to process. According to the IEEE 802.3 protocol, the destination address of an Ethernet packet is fixed at 6 bytes after the start character. After finding out the destination address from the message, compare it with the set destination address allowed to be received by looking up the table. The address that can be found in the table is the acceptable message, otherwise it is discarded. Only one of the packets with the same destination ...

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Abstract

The invention relates to the field of process layer network control of intelligent substations, and specifically discloses an FPGA-based process layer message filtering and bandwidth control method, which can identify the type of message on the process layer network at the receiving side, and filter and process multicast messages. Bandwidth control, filtering out multicast messages that are useless to the receiving side. This method filters out unnecessary messages or filters out required messages according to the destination address, message type, CRC check value, bandwidth and different information conditions (ID) in the message. The invention has the following advantages: not relying on switches; not relying on conventional flow control methods; high integration, no increase in hardware overhead; flexible functions, multiple filtering conditions can be set.

Description

technical field [0001] The invention relates to the field of process layer network control of intelligent substations, and specifically discloses an FPGA-based process layer message filtering and bandwidth control method. Background technique [0002] With the introduction of the smart substation process layer network, the input and output of protection and measurement and control rely on network communication, which increases the possibility of incorrect protection actions or other undesired effects due to network instability or insufficient bandwidth. Therefore, the process layer The stability and reliability of the network has become very necessary, and one of the most important means is to strengthen the flow management of the process layer network. [0003] The SV network and GOOSE network at the process layer can be networked together or networked separately; if IEEE1588 clock synchronization is used in the station, the SV network, GOOSE network and IEEE1588 network us...

Claims

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Application Information

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IPC IPC(8): H04L12/823H04L12/861H04L12/913H04L47/32H04L47/724
Inventor 周华良姚吉文谢黎姜雷吴海梅德冬杨志宏
Owner NARI TECH CO LTD
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