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Hard single-step system memory read and write monitoring method

A hard single-step, memory technology, applied in the field of memory monitoring in software systems, can solve problems that affect the normal operation of the system, affect the software debugging progress of multi-task embedded systems, and GDB cannot define and judge all rules well. Improve the effect of debugging progress

Active Publication Date: 2014-12-24
SHANGHAI BAUD DATA COMM
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AI Technical Summary

Problems solved by technology

[0004] 1. When the memory to be detected is frequently read / written, and programmers only care about memory operations that meet certain rules, GDB cannot define and judge all the rules well, which may cause the program being debugged to frequently enter the observation point exception, Many times programmers don't care about these exceptions
[0005] 2. In a multi-tasking system, there may be complex relationships between tasks. When a task enters an exception due to memory monitoring, it may affect the operation of other tasks, thereby affecting the normal operation of the entire system. When the programmer does not care about this exception, The programmer had to restart the system to debug
[0006] To sum up, the shortcomings of memory monitoring technology will greatly affect the debugging progress of multi-task embedded system software.

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  • Hard single-step system memory read and write monitoring method

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Embodiment Construction

[0031] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific illustrations.

[0032] This example takes IBM's PPC405EP to run the VxWorks operating system as an example to further illustrate the specific implementation process of the present invention's solution. The specific implementation steps are as follows, refer to figure 1 :

[0033] 1. After the initialization of VxWorks, use excVecSet to mount the EXC_OFF_DBG exception handling function, handle observation points and hard single-step exceptions, and use taskSwitchHookAdd to mount the task switching hook function;

[0034] 2. Set the memory interval to be monitored, and set the memory observation point as the memory interval to be monitored through the Dbcr1, Dac1, and Dac2 registers of the CPU. Dbcr1 can select the DA12 mode, and set D1R, D1W according to the a...

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Abstract

The invention discloses a hard single-step system memory read and write monitoring method. The memory monitoring is implemented through a CPU observing point mechanism, a hard single-step mechanism and an advanced patch technology. By the aid of the method, the problems of the existing memory monitoring mechanism can be solved effectively, and the method is adaptive to online debugging of a multiple (single) task embedding system.

Description

technical field [0001] The invention relates to software system technology, in particular to memory monitoring technology in the software system. Background technique [0002] The existing memory monitoring technology (such as the famous GDB) is to specify the memory range to be monitored by a task through the watch point mechanism. When it is detected that the task reads / writes this address, the task will not read / write this address Instead, it immediately enters the exception, and waits for the user to resolve and delete the watchpoint task before continuing to run. [0003] This method is more effective for debugging single-task systems, but it has the following disadvantages: [0004] 1. When the memory to be detected is frequently read / written, and the programmer only cares about memory operations that meet certain rules, GDB cannot define and judge all the rules well, which may cause the program being debugged to frequently enter the observation point abnormally, Ma...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 汪革苟利平王仁雷肖新峰
Owner SHANGHAI BAUD DATA COMM