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Input stage esd protection circuit

An ESD protection and input stage technology, applied in emergency protection circuit devices, circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, etc., can solve breakdown failure and can no longer effectively protect the gate oxide layer and other issues to achieve the effect of small layout overhead and no attenuation transmission

Active Publication Date: 2017-02-15
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Under the advanced technology, when the worst-case ESD strike occurs at the input end, the gate oxide layer of the input stage inverter often faces breakdown failure caused by overvoltage. At this time, the traditional input stage ESD protection circuit has already No longer effectively protects the gate oxide of the input stage inverter

Method used

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  • Input stage esd protection circuit
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  • Input stage esd protection circuit

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Embodiment Construction

[0030] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but should not be used to limit the scope of the present invention.

[0031] figure 2 It is a structural schematic diagram of the input stage ESD protection circuit of the present invention, and the input stage ESD protection circuit includes a diode module, a power clamp ESD protection circuit, a ballast module, a transmission gate module, and an inverter drive module.

[0032] The diode module is used to effectively guide the electrostatic charge to the designed discharge path when an ESD impact occurs between the pad and other chip pins, and provide a data path and a power line V when the chip is working normally. DD isolation between.

[0033] The power clamp ESD protection circuit is used to detect the power line V DD And the overvoltage event on the pressure pad, when...

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Abstract

The invention discloses an input stage ESD protection circuit which comprises a power source clamp ESD protection circuit, a ballast module, a transmission gate module, a phase inverter driving module and a diode module. According to the input stage ESD protection circuit, existing detection signal resources in the power source clamp ESD protection circuit are reasonably utilized, the transmission gate module and the ballast module are synchronous driven, it is effectively achieved that electrostatic charges are released through a designed releasing channel under the worst ESD impact situation, the undamped transmission of data is ensured when a chip is normally operated, and meanwhile it is ensured that the additional domain overhead brought to the chip by the ESD protection design is quite small.

Description

technical field [0001] The invention relates to the technical field of electrostatic discharge protection for integrated circuits, and more specifically relates to an input stage ESD protection circuit. Background technique [0002] Electrostatic discharge (Electronic Static Discharge, ESD) phenomenon is a common physical phenomenon in daily life. When a charged object touches a chip pin or the chip itself is charged with static electricity and then touches other low-resistance objects, the charge will Transfer occurs between objects of unequal potential. The charge transfer process is a process of instantaneous high current. For integrated circuit chips, the instantaneous high current pulses brought by ESD events often lead to the failure of semiconductor devices in the chip. No matter which mode of ESD impact, its instantaneous peak current can reach the order of several or even tens of amperes, which greatly exceeds the current normal working range of semiconductor devic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02H9/04
Inventor 王源陆光易曹健贾嵩张兴
Owner PEKING UNIV