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Dual-SoC (System on Chip) resetting system and method

A reset method and chip technology, applied in the field of communication

Active Publication Date: 2015-02-18
北京京瀚禹电子工程技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Since the prior art generally uses its own external buttons to complete the reset of the respective SoC chip software, this processing method needs to connect an additional external button, and it is necessary to press the button twice when simultaneously resetting the two SoC chip software.

Method used

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  • Dual-SoC (System on Chip) resetting system and method
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  • Dual-SoC (System on Chip) resetting system and method

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Embodiment Construction

[0025] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0026] It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual impleme...

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Abstract

The invention provides a dual-SoC (System on Chip) resetting system and method. The dual-SoC chip resetting method comprises the following steps: presetting three time periods which are not mutually overlapped, wherein the three time periods respectively correspond to operations of resetting a first chip, resetting a second chip, and simultaneously resetting the first chip and the second chip; obtaining continuous key time of an external key; and when monitoring that the continuous key time belongs to any one time period of the three time periods, executing the operation of resetting the chip, corresponding to the time period to which the continuous key time belongs. According to the technical scheme of the invention, different resetting manners of two SoC chips are determined according to the key time by virtue of one external key, so that in a case of reducing the number of the external keys, single resetting of software of different SoC chips can be realized, and simultaneous resetting of the software of the two SoC chips can be realized once.

Description

technical field [0001] The invention relates to the communication field, in particular to a double SoC chip reset system and method. Background technique [0002] In the communication field, in order to integrate more functions on one product, sometimes dual SoC (System On Chip, system on chip) chips are used to design the product. For example, in order to support IEEE802.11n standard and PLC (Power Line Communication, power line communication) standard at the same time, the smart wireless extender integrates wireless routing, AP (Access Point, wireless access node), and power modem functions, and can use two SoCs The chips are connected through the MII (Media Independent Interface, Media Independent Interface) port. They are WIFI module and PLC power module respectively. The two SoC chips are respectively processed by their own processors. Wherein, the WIFI module supports an ETH (Ethernet, Ethernet) interface and a wireless interface. The PLC module completes the network...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/24
CPCG06F1/24
Inventor 夏峰
Owner 北京京瀚禹电子工程技术有限公司