SOI (Silicon On Insulator) NMOS (N-channel Metal Oxide Semiconductor) device and manufacturing method for improving ESD (Electronic Static Discharge) protection capability

Abstract

The invention discloses an SOI (Silicon On Insulator) NMOS (N-channel Metal Oxide Semiconductor) device and a manufacturing method for improving the ESD (Electronic Static Discharge) protection capability. A drain electrode area of the device serves as an implanting window to perform the ESD implanting in the inclined direction, an ESD ion implantation area is formed in the body area channel bottom local area which is close to the inner side of the drain electrode area, the ESD triggering current is guided through the ESD ion implantation area to flow through a body area so as to increase the depth range of the current path and reduce the triggering voltage, and accordingly the reaction speed of the SOI NMOS device when the ESD arrives can be improved and the improvement of the ESD protection capability of the device can be implemented.

Description

technical field [0001] The invention relates to the technical field of manufacturing semiconductor integrated circuits, and more particularly relates to an SOI NMOS device capable of improving ESD protection and a manufacturing method. Background technique [0002] As semiconductor device technology continues to enter submicron and deep submicron, the reliability of ESD (electrostatic discharge) protection devices becomes more and more important. [0003] In order to overcome the problem of decreased electrostatic discharge protection ability caused by the LDD structure, electrostatic discharge ion implantation (ESD implant) technology is used to improve the ESD protection ability of NMOS devices. The principle is to make two different NMOS devices on the same circuit , one is an NMOS device with an LDD structure for internal circuit units; the other is an NMOS device without an LDD structure for input / output ports. By adding an ESD injection layer on the NMOS device at the...

AI Technical Summary

Problems solved by technology

However, since the drain of the SOI NMOS device is completely implanted with N+, there is no room for ESD implantation below the drain. Therefore, the above-mentioned existing method of ESD implantation in the drain region is no longer applicable, and other new technologies must be used to improve ESD protection capability of SOI NMOS devices

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