Super junction device and manufacturing method thereof

Abstract

The invention discloses a super junction device. A current flowing region includes a plurality of N type thin layers and P type thin layers which are arranged alternately, wherein each N type thin layer includes a high-resistivity portion at the middle and low-resistivity portions at two sides; charges of the N type thin layers and charges of the P type thin layers are not balanced; charges of the low-resistivity portions of the N type thin layers and charges of the P type thin layers are balanced; the P type thin layers cannot perform complete horizontal depletion on the high-resistivity portions; and P wells at the tops of the N type thin layers perform gradually-expanded longitudinal depletion on the high-resistivity portions of the N type thin layers with the increase of reverse bias voltage. The invention also discloses a manufacturing method of the super junction device. With the super junction device and the manufacturing method thereof of the invention adopted, the reverse recovery characteristics of the device can be improved, and the device can have low specific on resistance.

Description

Technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a super junction device; the invention also relates to a manufacturing method of a super junction device. Background technique [0002] Super junction MOSFET adopts a new withstand voltage layer structure, using a series of alternately arranged P-type semiconductor thin layers and N-type semiconductor thin layers to combine the P-type semiconductor thin layers and N-type semiconductor thin layers at a lower voltage in the off state. Type semiconductor thin layer is depleted to achieve mutual compensation of charges, so that P-type semiconductor thin layer and N-type semiconductor thin layer can achieve high breakdown voltage under high doping concentration, thereby achieving low on-resistance and high breakdown at the same time Voltage, breaking the theoretical limit of traditional power MOSFET. In the US patent US5216275, the above alternately arranged P...

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Problems solved by technology

[0004] In the super junction process, due to the use of alternate P / N thin layers, the body diode of the super junction device, that is, the diode formed between the P-type semiconductor thin layer and the N-type semiconductor thin layer, can operate at a lower reverse bias voltage such as 50 Vds will completely deplete the P-type semiconductor thin layer and the N-type semiconductor thin layer, which makes the diode have a very hard reverse recovery characteristic. This hard reverse recovery characteristic causes the recovery current of the device to change sharply. Severe fluctuations in reverse recovery cause electromagnetic noise (EMI NOISE) in the circuit, which affects the work of other devices in the circuit. In this regard, super junction devices are not as good as conventional MOSFET devices, because conventional MOSFET devices The depletion of the N-drift region always expands with the increase of the voltage (Vds), and the reverse recovery characteristic is soft

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