A Method for Reducing Power Consumption of Main Memory in Full Load Operation
A memory and full-load technology, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc., can solve problems such as system performance degradation
Active Publication Date: 2017-12-05
SHANGHAI XINCHU INTEGRATED CIRCUIT
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Problems solved by technology
Although this method can reduce power consumption, it is not useful in applications where the main memory is intensively accessed
Because the main memory sometimes enters the idle state for a very short time, if the main memory switches to the low-power mode at this time, it will be awakened to the working mode soon, not only does not reduce the power consumption much, but also because it is frequently in the two Switching between these modes will cause more power consumption overhead, and the time overhead required for switching between the two modes will also lead to a decrease in system performance
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[0044] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.
[0045]Generally speaking, a memory module (DIMM, dual in-line main memory module) contains multiple ranks. For ranks, we all know that the bit width of the data transmission interface between the memory and the processor is 64-bit (ECC In order to maintain cooperative work, this must be guaranteed for each transmission, but the bit width of a single memory chip cannot reach 64-bit, generally 4-bit, 8-bit, 16-bit bit and the like, so multiple memory chips must be formed into a small group to jointly achieve a total bit width of 64-bit. This handful of memory chips is a physical bank (P-Bank), also known as rank. A rank is composed of many DRAM chips, and the smallest data access unit in the rank is generally a page. Then migrate the page data with high main memory access frequency (called main ...
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The invention relates to the technical field of storage, in particular to a method for reducing the power consumption of a main memory under full load operation. The using frequencies of different characteristic data of different application programs of different customers within a period of time are counted and ranked, so that main data (namely hot data) and auxiliary data (namely cold data) in the main memory are distinguished, the main data and the auxiliary data are stored in different ranks in the main memory and are counted through a self-learning method, the optimum switching time of switching the rank where the auxiliary data in the main memory are stored from an idle state to a low-power-consumption mode is learned and judged, and the power consumption of the main memory under the full load operation is reduced to the greatest extent.
Description
technical field [0001] The invention relates to the field of storage technology, in particular to a method for reducing the power consumption of a main storage memory in full load operation. Background technique [0002] Main memory (DRAM, also known as memory or main memory) is a volatile memory that temporarily stores processor (CPU) calculation data and exchanges data with external storage such as hard disks. It is a bridge to communicate with the CPU. All programs run in the main memory, and their performance has a great impact on the system, especially in the server field. However, whether it is a personal notebook (PC) or a server, the development speed of the main memory technology is much lower than that of the CPU or even the hard disk technology, especially in terms of power consumption. According to statistics, in server-level applications, the main memory power consumption accounts for more than 40% of the entire system power consumption, and the main memory pow...
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IPC IPC(8): G06F1/32
CPCG06F1/3234G06F1/3275
Inventor 亢勇陈邦明
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT