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Method for double-sided polishing of semiconductor wafer

A double-sided polishing, semiconductor technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as increasing the risk of carrier warpage, reducing the moment of inertia, and damaging installation

Active Publication Date: 2018-01-26
SILTRONIC AG
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0028] However, these additional "polish cuts" in the circular carrier plate reduce its moment of inertia and, as a result, less torsion resistance
This is disadvantageous, since the risk of warping of the carrier plate is thereby increased
Carrier warping can lead to pad damage, reduced pad life, particle generation, polishing scratches, and even wafer cracking, damage to mounting
[0029] Considering the further increased surface area of ​​semiconductor wafers of the future generation, for example wafers with a diameter of 450 mm, a homogeneous polishing agent distribution (polishing agent application) can only be achieved to a limited extent in the polishing process according to the prior art

Method used

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Embodiment Construction

[0034] The inventive method includes not only local aspects limited to specific technical components or individual method-technical features (eg individual method parameters), but also related method features. These method characteristics are grouped into:

[0035] 1) Polishing pads with a specific surface structure,

[0036] 2) Reconstruction of the carrier board used to accommodate the wafer, and

[0037] 3) Supply of polish on both sides.

[0038]In the inventive method for simultaneous double-sided polishing (DSP) of wafers made of semiconductor material, a silica sol according to the prior art is used as polishing agent, said silica sol comprising particles with a size of 20-50 nm A slurry of colloidally distributed particles.

[0039] The distribution of the polishing agent in the DSP process is influenced by, among other things, the properties of the polishing pad surface (working surface) which is in material-removing contact with the front and / or back side of the s...

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Abstract

The invention relates to a method for double-sided polishing of semiconductor wafers, wherein the surface of the polishing pad is interrupted in each case by at least one groove-shaped depression extending helically from the center to the edge. By providing polishing agent on both sides, locally individually adjustable polishing agent quantities and a modified carrier plate, an optimized polishing agent distribution can be achieved, especially in the case of semiconductor wafers with a diameter of 450 mm.

Description

[0001] This application is a divisional application of a Chinese patent application with application number 201210342017.6 and titled "Method for Double-sided Polishing of Semiconductor Wafer" filed on September 14, 2012. technical field [0002] The invention relates to a double-sided polishing method for a semiconductor wafer. Background technique [0003] In particular, the present invention relates to double-sided polishing of semiconductor wafers for next-generation technologies, mainly wafers with a diameter of 450 mm. Currently, silicon wafers with a diameter of 300 mm, mainly polished or epitaxially coated, are used in more demanding applications in the electronics industry. Silicon wafers with a substrate diameter of 450mm are still under development. [0004] However, the enlargement of the substrate diameter is accompanied by important, and in some cases completely new, hitherto unknown technical problems. [0005] Many processing steps require radical modificat...

Claims

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Application Information

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IPC IPC(8): B24B37/16
CPCB24B37/16B24B37/042B24B37/08B24B37/26H01L21/304
Inventor J·施万德纳
Owner SILTRONIC AG
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