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A device and method for realizing integration of cpld and flash programming

A technology of programmers and programming modules, applied in code compilation, program code conversion, software deployment, etc., can solve problems such as FLASH cannot be programmed online, CPLD and FLASH programming operations are cumbersome, etc., to optimize data transmission rate and processing rate, save The effect of single board space and labor cost saving

Active Publication Date: 2018-05-11
FENGHUO COMM SCI & TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] For the defects existing in the prior art, the object of the present invention is to provide a kind of device and method that realizes the integration of CPLD and FLASH programming, the present invention solves the problem that traditional method CPLD and FLASH programming operation are loaded down with trivial details, simplifies programming procedure, improves Improve production efficiency and save labor costs; solve the problem that FLASH cannot be programmed online in traditional programming methods, and expand the usage scenarios

Method used

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  • A device and method for realizing integration of cpld and flash programming
  • A device and method for realizing integration of cpld and flash programming
  • A device and method for realizing integration of cpld and flash programming

Examples

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Embodiment 1

[0027] see figure 1 As shown, a device that realizes the integration of CPLD and FLASH programming includes a programmer, a target board and a bus decoder; the programmer includes a host computer and a SOC chip with software installed; the target board includes at least one FLASH chip . At least one CPLD chip; wherein, the bus decoder is set on the programmer. The upper computer is connected to the input end of the SOC chip through the USB data line, the output end of the SOC chip is connected to the input end of the bus decoder through a self-defined parallel bus, and the output end of the SOC chip is connected to the JTAG of each CPLD chip through the JTAG bus. The programming interface is connected, and each FLASH chip is connected to the output terminal of the bus decoder through a parallel bus (composed of data / address / control lines of FLASH, with a large number of signals). The SOC chip includes a FLASH programming module and a CPLD programming module; the FLASH program...

Embodiment 2

[0037] see figure 2 As shown, this embodiment is basically the same as Embodiment 1, the only difference is that the bus decoder is set on the target board. In this embodiment 2, the bus decoder is set on the target board, then the programmer and the target board are connected through a custom parallel bus, the number of signals is small, which is convenient for connector selection and function, and is suitable for downloading one or more flashes. In Embodiment 1, the bus decoder is set on the programmer, and the programmer and the target board are connected through the parallel bus of the FLASH standard. The number of signals is large, which is not convenient for connector selection and function expansion, and is only suitable for 1-2 pieces of FLASH. download.

[0038] see Figure 4 As shown, the method for realizing the integration of CPLD and FLASH programming based on the device described in embodiment 1 or 2 may further comprise the steps:

[0039] Step S1, the upper...

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Abstract

The invention discloses a device and method capable of achieving programming integration of a CPLD and a FLASH, and relates to the technical field of embedded systems. The device comprises a programming device, a target board and a bus decoder. The programming device comprises an upper computer with software and an SOC chip. The target board comprises at least one FLASH chip and at least one CPLD chip. The upper computer is connected with the input end of the SOC chip through a USB data line, the output end of the SOC chip is connected with the input end of the bus decoder through a self-defined parallel bus, each CPLD chip is connected with the output end of the SOC chip through a JTAG bus, and each FLASH chip is connected with the output end of the bus decoder through a parallel bus. By means of the device and method, the problem that CPLD and FLASH programming operation is cumbersome in a traditional method is solved, the programming process is simplified, production efficiency is improved, and labor costs are saved; the problem that the FLASH cannot achieve on-line programming in a traditional programming method is solved, and the use range is widened.

Description

technical field [0001] The present invention relates to the technical field of embedded systems, specifically a device and method for realizing the integration of CPLD (Complex Programmable Logic Device) and FLASH (flash memory) programming. Background technique [0002] At present, on the embedded processor platform, only two sets of programmers and methods can be used to program CPLD and FLASH respectively. The current programming methods of CPLD and FLASH are as follows: [0003] There are generally two programming methods for CPLD: 1. Use the host computer software and special programmer provided by the CPLD manufacturer for programming. This method cannot realize integrated programming; 2. Download the program to the CPLD online through the processor. In this method, The prerequisite for the CPU to program the CPLD is that the CPU is already working normally, but the power-on configuration of the CPU in a general medium-to-large embedded system requires the use of a CPL...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F8/65G06F8/41
Inventor 陈昶李李传宝胡胜强王峰罗雄豹
Owner FENGHUO COMM SCI & TECH CO LTD