Memory array plane select

Abstract

Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.

Description

technical field [0001] The present invention relates generally to semiconductor devices and methods, and more particularly to apparatus and methods for memory array plane selection. Background technique [0002] Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory, including random access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), resistive variable memory, and flash memory, among others. memory. Types of resistance variable memory include phase change memory, programmable conductor memory, and resistive random access memory (RRAM), among others. [0003] Memory devices are utilized as non-volatile memory for a wide range of electronic applications requiring high memory density, high reliability, and data retention without power. Non-volatile memory can be used, for example, in...

AI Technical Summary

Problems solved by technology

However, as the density of memory cells increases in a given area due to the decreasing size of the memory cells and / or the planes of memory cells stacked on top of each other, the footprint of the decoding logic can exceed the footprint of the memory array

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