Word line voltage generating circuit and memory

Abstract

The word line voltage generating circuit of the present invention includes: a voltage conversion circuit connected between the control signal line and the first node; a delay circuit connected between the first node and the second node; a first capacitor connected in series Between the delay circuit and the second node; the first PMOS transistor, whose source is connected to the first power supply terminal, the drain is connected to the second node, and the gate is connected to the third node; the second PMOS transistor, whose source is connected to the second node, The drain is connected to the third node, the gate is connected to the fourth node; the source of the first NMOS transistor is connected to the third node, the drain is connected to the first inverting circuit, and the gate is connected to the fourth node; the second inverting circuit , connected between the first node and the fourth node; the second capacitor, one pole of which is connected to the second node, and the other pole is grounded; the third capacitor, one pole of which is connected to the second node, and the other pole is grounded. The invention can prevent miswrite operation, reduce the number of transistors, reduce the use of resistors, thereby reducing the chip area.

Description

technical field [0001] The invention relates to the technical field of semiconductor memory, in particular to a word line voltage generation circuit and memory. Background technique [0002] Fast reading and writing of storage units has always been the pursuit goal of high-speed memory chips (such as flash, etc.). The word line voltage establishment time of the read and write operations on the word line of the memory cell is an important factor restricting the read and write speed, therefore, for the memory, the word line voltage generation circuit is particularly important. [0003] Structure Reference for Flash Memory figure 1 As shown, the array is composed of several flash memory cells, and each flash memory cell is connected to the corresponding source line, word line and bit line. All the source wires are connected together for high level. A bit line and a word line correspond to a flash memory unit. When a flash memory unit is selected, the word line and bit line a...

AI Technical Summary

Problems solved by technology

However, in the prior art, when the source line voltage is lower than the word line voltage by adopting the structure of the voltage divider circuit, more resistors and more transistors need to be used in the circuit, which increases the area of ​​the chip.

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