Method for removing intersymbol interference and decision feedback sequence predicator

An inter-symbol crosstalk and decision feedback technology, applied in the field of decision feedback sequence predictors, can solve the problems of chip design risks, the overall performance of 1000BASE-T physical layer chips cannot be fully verified by FPGA, and hidden dangers.

Active Publication Date: 2015-05-13
HUAWEI TECH CO LTD
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Problems solved by technology

[0009] The present invention provides a method for eliminating intersymbol crosstalk and a decision feedback sequence predictor, in order to solve the problem existing in the prior art that DFSE

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  • Method for removing intersymbol interference and decision feedback sequence predicator
  • Method for removing intersymbol interference and decision feedback sequence predicator

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Embodiment Construction

[0080] The technical solutions in this embodiment will be clearly and completely described below with reference to the drawings in this embodiment. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0081] In order to solve the problem in the prior art that the traditional decision feedback sequence predictor (DFSE) cannot run in the FPGA because its critical path is too long, and thus the overall performance of the 1000BASE-T physical layer chip cannot be fully verified by the FPGA. Chip design brings huge risks and hidden dangers. The present invention provides a novel decision feedback sequence predictor.

[0082] The DFSE provided by this embodiment includes an intersymbol interference s...

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Abstract

The invention discloses a method for removing intersymbol interference and a decision feedback sequence predicator, and relates to the technical field of communication. The method comprises the steps of receiving an input signal through an intersymbol interference forming filter; processing the input signal to change the tap energy distribution of intersymbol interference to obtain a first output signal; receiving the first output signal through an improved feed-forward equalizer; removing all taps of a forebody ISI and a first tap of an afterbody ISI in the first output signal to obtain a second output signal; receiving the second output signal through an improved decision feedback equalizer; removing the u+1 to u+m taps of the afterbody ISI in the second output signal to obtain a third output signal; receiving the third output signal through a parallel decision feedback decoder to perform viterbi decoding; removing the second to the u taps of the afterbody ISI in the third output signal to obtain a target signal. The method is generally applied to the specific achievement of an 10000BASE-T physical layer chip.

Description

technical field [0001] The present invention relates to the field of communication technologies, and in particular, to a method for eliminating inter-symbol crosstalk and a decision feedback sequence predictor. Background technique [0002] Ethernet started to develop from 10M, and has experienced many changes to the current Gigabit Ethernet. Gigabit Ethernet is characterized by high efficiency, high speed, and high performance, and has been widely used in finance, commerce, education, government agencies and other industries. [0003] Gigabit Ethernet adopts 1000BASE-T Ethernet technology, which can achieve a transmission speed of 1000M using 4 pairs of unshielded Category 5 twisted pair cables as the transmission medium. In the specific implementation process of 1000BASE-T technology, bidirectional transmission and reception are carried out on all 4 pairs of Category 5 twisted pairs at the same time; at the same time, a five-level Pulse Amplitude Modulation (PAM- 5). In...

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Application Information

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IPC IPC(8): H04L25/03
Inventor 邱炳森
Owner HUAWEI TECH CO LTD
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