True random number generating circuit

A technology for generating circuits and true random numbers, applied in the field of hardware implementation of cryptographic systems, can solve problems such as the decline of randomness of random numbers, and achieve the effects of improving random characteristics, saving chip area, and improving random characteristics.

Inactive Publication Date: 2015-06-03
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, the reduced bandwidth of the amplifi

Method used

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Examples

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Embodiment Construction

[0025] see image 3 As shown, in the embodiment shown in this figure, the true random number generating circuit includes: a high-frequency oscillator, a low-frequency oscillator, a T flip-flop, and a multi-stage divider by two.

[0026] The high-frequency oscillator can be composed of a simple ring oscillator composed of multi-stage inverters, its output is connected to a multi-stage two-frequency divider, and the output of the multi-stage two-frequency divider is used as the data input of the T flip-flop. The low-frequency oscillator clock obtained based on resistor noise amplification has a large cycle-to-cycle jitter. This low-frequency oscillator is used as the clock input of the T trigger to sample the high-frequency oscillator, and finally the output sequence obtained at the output terminal Q of the T trigger It is a true random number.

[0027] This embodiment does not use the digital post-processing module, and the obtained random performance ratio figure 2 The circ...

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Abstract

The invention discloses a true random number generating circuit. The true random number generating circuit comprises a high-frequency oscillator, a low-frequency oscillator and a T trigger, wherein the high-frequency oscillator is used for generating high-frequency clock signals, the low-frequency oscillator is used for generating a noise source on the basis of resistance thermal noise, the clock input end CLK of the T trigger is connected with the output end of the low-frequency oscillator, and the noise source generated by the low-frequency oscillator serves as a clock signal. The true random number generating circuit further comprises a multi-stage divide-by-2 frequency divider, wherein the input end of the multi-stage divide-by-2 frequency divider is connected with the output end of the high-frequency oscillator, and the output end of the multi-stage divide-by-2 frequency divider is connected with the data input end T of the T trigger. The low-frequency oscillator conducts sampling on the high-frequency clock signals which are processed through frequency division of the multi-stage divide-by-2 frequency divider, and the output end Q of the T trigger outputs true random numbers. The true random number generating circuit has a good random characteristic, is easy to implement, and saves the chip area.

Description

technical field [0001] The invention relates to the field of cryptosystem hardware implementation, in particular to a true random number generating circuit. Background technique [0002] Random numbers are widely used in smart cards, especially in the field of cryptography, and are an important part of the hardware implementation of cryptosystems. Whether it is the public key and private key in the asymmetric algorithm, or the key in the symmetric algorithm, random numbers are needed. The performance of the random number directly affects the security and reliability of the security chip. An ideal random number usually refers to a string of random "1" and "0" sequences, and each bit in the sequence has no correlation with other bits. [0003] Random numbers are divided into pseudo random numbers (PRNG) and true random numbers (TRNG). [0004] Pseudo-random numbers can generally be generated by digital logic circuits, which are random in a short period of time, but they wil...

Claims

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Application Information

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IPC IPC(8): G06F7/58
Inventor 苏威
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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