42 results about "Boolean network" patented technology

A Boolean Network rule engine for evaluation of rules is described that comprises: a rules interface for receiving a set of rules, each rule having at least one condition; a network builder for building a Boolean Network representation of the set of rules including transducers linked by logic gates, each transducer generating a Boolean value based on evaluating an item of input data against a condition of a rule; and a runtime evaluation engine for receiving input data, detecting changed items of input data, activating links among transducers and logic gates of the Boolean Network representation based on the changed items of input data so as to utilize transducers and logic gates of the Boolean Network representation relevant to rule evaluation outcome, evaluating rules based on the input data and active transducers and logic gates and returning results of rule evaluation.

Logic Gate (100), particularly for integrated circuits including a Boolean network (105) having at least an input (106) and having at least an output node (107) and at least a terminal (108) connected to a first node at fixed potential (109) corresponding to a first logical level of the gate. The gate is characterized by the fact that the output node (107) is connected to a first pair of switches including a first switch (101) and a second switch (102), which are activated alternately, and are connected respectively, by a respective terminal, to the first node (109) at fixed potential and to the output node (107). Between the two switches there is a second pair of switches (103, 104) connected to a second node at fixed potential (110) corresponding to a second logical level of the gate. The switches of the second pair of switches are connected together in a way that the turning on of one switch of the second pair involves the turning off of the other switch of the second pair and the turning on of one of the switches of the second pair is suitable to bring the output node (107) to the potential of the second node at fixed potential (110).

A physically unclonable function (PUF) device includes a hybrid Boolean network module of a ring of N number of Boolean nodes connected end to end and a sampling module, wherein the hybrid Boolean network module comprises N number of xor logic gates and corresponding N number of multiplexers, wherein a function change module is disposed between an output end of a first xor logic gate of the N number of xor logic gates and an input end of a first multiplexer of the N number of multiplexers, wherein each Boolean node is provided with four input ends and three output ends, the four input ends respectively connected to an output end of each of two juxtaposing Boolean nodes, an initial excitation signal and a control delay signal, the three output ends respectively output to an input of each of two juxtaposing Boolean nodes, and the sampling module.

The invention discloses an apparatus and a method for simulating a single photon pulse signal source. The apparatus comprises a quartz crystal oscillator, at least three low-speed Poisson pulse generators and multi-input logic or gates. The method comprises the following steps: 1), generating a low-speed Poisson pulse signal; 2), generating and simulating the single photon pulse signal and other steps. Comparing with the prior art, the invention has the following beneficial effects: the apparatus of the invention is based on the reconfigurable property of the FPGA, the integration is high, thecomposition is simple, the cost is low, the total number of used logic gates is small, and requirements for a CPU is low; the single-photon pulse signal source is simulated based on a Boolean network, a Poisson distribution model is realized by utilizing characteristics of FPGA parallel processing, and the method of the invention has the advantages of being high in efficiency, convenient, high insignal-to-noise ratio, good in stability and low in cost, and the simulation degree of the single photon pulse signal source is close to ideal single photon pulse signal source under actual conditions.

As an important part of the cryptosystem, random numbers are widely used in security systems, such as session keys, initialization vectors and digital signatures. The invention is a method and device for generating true random numbers, which are composed of an entropy source module, a sampling module, an exclusive OR logic gate, a cell state machine, a test module, a CPU and a selection controller. The entropy source module is composed of two identical oscillator structures, which is a chaotic oscillator structure based on an autonomous Boolean network. The entropy source module can generate chaotic signals with wide frequency spectrum and high bandwidth. After the random sequence is tested by the test module, the CPU judges whether it passes the test, and if it passes, the sequence is directly output; if it fails, the data is returned to the post-processing module through the XOR circuit. At the same time, select the controller to select different post-processing methods to process the data, and after processing, enter the test module again for testing until the test is passed. The random code sequence generated by the present invention can pass the random number industry standard test.

The invention relates to a method and device for controlling a Boolean network robot. The method comprises the steps that a Boolean network model of the robot is constructed; a superposition method ora method of development is adopted for obtaining auxiliary matrixes corresponding to all nodes in the Boolean network model according to dynamic description in the Boolean network model; a node structure matrix is computed according to the obtained auxiliary matrixes; a network structure matrix is obtained through the correspondence between the network structure matrix and the node structure matrix; and the Boolean network robot is controlled according to the network structure matrix. By transforming the computational problem of the network structure matrix into a solution to the auxiliary matrixes with special structures and then transforming computation of the auxiliary matrixes into a simple matrix operation through the superposition method or the method of development, the computational complexity is lowered, the computation speed is increased, and the real-time requirements in robot control are met.