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Composite mask for high energy ion implantation

A composite mask and high-energy ion technology, which is applied in the field of masks, can solve the problems of easy residual photoresist mask, many process errors in graphic size, and affecting the blocking effect of thin film masks, so as to avoid device process failure, Avoiding mask residues and shortening the deglue time

Inactive Publication Date: 2015-08-26
SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the hard mask avoids the bombardment denaturation and residual problems of the photoresist mask, it needs to deposit an additional dielectric film, and perform multi-step photolithography and etching, and the process is complex
The reasons why the hard mask is not suitable for HgCdTe devices are: 1) The deposition temperature of the hard mask layer is far beyond the temperature range (below 70°C) that the HgCdTe material can withstand, while the low temperature growth (2 , graphite, amorphous carbon, etc.) have a large lattice mismatch with HgCdTe materials, and the adhesion of the film is poor; 3) the hard mask requires multi-step photolithography and pattern etching, and the introduced pattern size There are many process errors, which makes it difficult to guarantee the pattern accuracy of the small-size implantation area

Method used

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Examples

Experimental program
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Effect test

Embodiment 1

[0024] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle evaporation deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. First, a cadmium telluride injection barrier layer (such as figure 2 As shown in (1), clean the chip, spin-coat a layer of positive photoresist with a thickness of 2 to 3 microns on the surface of the chip, use a photolithographic plate to expose the chip to ultraviolet light, and then develop and fix it. After that, obtain a photoresist implant mask (such as figure 2 (2) shown).

[0025] Load the chip with the mask pattern prepared on the sample stage of the high-vacuum thermal evaporation equipment, first rotate the sample stage at an inclination angle of 0°, and deposit ~20nm thick zinc sulfide film; then rotate the sample stage at an ...

Embodiment 2

[0029] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle sputter deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. First, a cadmium telluride injection barrier layer (such as figure 2 As shown in (1), clean the chip, spin-coat a layer of positive photoresist with a thickness of 2 to 3 microns on the surface of the chip, use a photolithographic plate to expose the chip to ultraviolet light, and then develop and fix it. After that, obtain a photoresist implant mask (such as figure 2 (2) shown).

[0030] Load the chip with the prepared mask pattern on the sample stage of the magnetron sputtering equipment, first rotate the sample stage at an inclination angle of 0°, and sputter a silicon dioxide film with a thickness of ~10nm; then rotate the sample stage at a...

Embodiment 3

[0034] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle evaporation deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. First, a cadmium telluride injection barrier layer (such as figure 2 As shown in (1), clean the chip, spin-coat a layer of positive photoresist with a thickness of 2 to 3 microns on the surface of the chip, use a photolithographic plate to expose the chip to ultraviolet light, and then develop and fix it. After that, obtain a photoresist implant mask (such as figure 2 (2) shown).

[0035] Load the chip with the prepared mask pattern on the sample stage of the high-vacuum thermal evaporation equipment, first rotate the sample stage at an inclination angle of 0°, and deposit ~80nm thick zinc sulfide film; then rotate the sample stage at an ...

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Abstract

The invention discloses a composite mask for high energy ion implantation. The mask of the invention is a composite photoresist mask in a three-layer structure. A photoresist mask pattern is made between an implantation barrier layer dielectric film and a surface sacrifice dielectric film to serve as a high energy ion implantation mask. According to the composite mask of the invention, the problem of chapped degeneration of the photoresist mask under high energy ion bombardment can be solved, the mask can be removed without residual, cleanness of the chip surface can be ensured, and device performance is improved.

Description

technical field [0001] The invention relates to mask technology in microelectronic technology, in particular to a composite mask structure for high-energy ion implantation. Background technique [0002] Infrared focal plane array detectors based on mercury cadmium telluride photodiodes have been widely used in military security, resource exploration, ocean monitoring, and space remote sensing. According to the device structure, HgCdTe photodiodes can be divided into n-on-p type and p-on-n type. The n-on-p process has matured after decades of technology accumulation, and the short-wave infrared (SWIR) and mid-wave infrared (MWIR) HgCdTe FPA devices based on this process have already had high performance. However, for long-wave (LW) and very long-wave (VLW) devices, in order to obtain the spectral response of the corresponding band, the band gap of the HgCdTe base material must be further reduced (<90meV). In such a narrow bandgap, the tunneling current component in the d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/426H01L21/36H01L21/027H01L21/475H01L21/471
CPCH01L21/0226H01L21/0332H01L21/266H01L21/426
Inventor 施长治林春
Owner SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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