Heterogeneous multi-core SoC design evaluation system

Abstract

The heterogeneous multi-core SoC design evaluation system provided by the present invention includes: a component abstract modeling module, which is used to perform abstract modeling on the master-slave components of the bus, wherein the master-slave components include a coprocessor; a design space definition module , for setting each variable and the value range corresponding to each variable according to the SoC design requirements of the system on chip; the performance index evaluation module is used for constructing a first SoC structure according to the each variable and the value range, and for all The first SoC structure is simulated and evaluated and comprehensively evaluated, thereby obtaining the performance index of the SoC; the model training and exploration module is used to use the performance index and the various variables to perform model training through a machine learning algorithm to obtain a prediction A model or a classification model; an architecture optimization module, configured to select a second SoC structure by using the prediction model or the classification model. The invention can greatly assist in completing the design and evaluation of the heterogeneous multi-core SoC architecture.

Description

technical field [0001] The invention relates to computer application technology, in particular to a heterogeneous multi-core SoC design evaluation system. Background technique [0002] With the continuous development of chip manufacturing technology and the increasing demand for multi-functional, high-efficiency, low-energy, and easy-to-carry chips in today's society, chips that blindly pursue high frequency, high capacity, and homogeneous multi-core in the past have encountered bottlenecks. In order to meet the new demands for integrated circuits in the new era, the International Technology Roadmap for Semiconductors (ITRS) proposed a new development goal for the industry - "More than Moore". ITRS believes that the development of integrated circuits should not be limited to "Moore's Law" and blindly pursue increasing the capacity of chips or reducing the volume of chips, but should focus on using different methods to provide consumers with more added value. Development in ...

AI Technical Summary

Problems solved by technology

[0004] The technologies, software and processes involved in the design of heterogeneous multi-core SoC architecture are very complicated

If only relying on the manual series connection by the designer, not only the work efficiency is extremely low, but also it is extremely prone to errors

Images