I2C bus multiplexing method and system for realizing resetting of integrated chips and electronic equipment

Abstract

The invention provides an I2C bus multiplexing system for realizing resetting of integrated chips. The I2C bus multiplexing system comprises N first integrated chips, M second integrated chips, a central processing module and a logic control module, wherein N and M are more than or equal to 1; the central processing module is connected with the N first integrated chips through an I2C bus and is used for transmitting a first control signal so as to control reading-writing operation of the N first integrated chips or transmitting a second control signal meeting resetting requirements of the second integrated chips when the M second integrated chips have a specific condition so as to control resetting operation of the M second integrated chips; the logic control module is connected with the central processing module through a serial clock line in the I2C bus, is connected with the M second integrated chips and is used for receiving the second control signal output by the central processing module, so as to convert the second control signal subjected to logic processing into a resetting signal for resetting the second integrated chips. According to the I2C bus multiplexing system, special resetting chips are saved, GPIO (General Purpose Input / Output) interfaces are saved, peripheral circuits are reduced and the wiring of a PCB (Printed Circuit Board) is more convenient.

Description

technical field [0001] The invention belongs to the field of electronic computing, and relates to a reset method and system, in particular to a reset method, system and electronic equipment for realizing integrated chip reset through I2C bus multiplexing. Background technique [0002] In multi-sub-card system products, it often occurs that the control pin resources of the central processing unit are insufficient to meet the needs of the sub-cards. And during the operation of the product, if a certain chip has a problem and needs to be partially reset, it is necessary to output a reset signal to reset the chip in the case of continuous power; usually, the chip is reset through a special reset chip or a special reset chip. GPIO port or CPLD to reset, GPIO port and CPLD can reset a certain chip during the operation of the device, and the reset chip can only be reset after power-on, which requires the auxiliary processing of special peripheral circuits to be able to operate with...

AI Technical Summary

Problems solved by technology

[0004] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method, system and electronic equipment for realizing integrated chip reset by multiplexing the I2C bus, which are used to solve the problem of multi-subcard system products in the prior art during operation. When there is a problem with one of the integrated chips, there are not enough GPIO ports, and a special reset chip is required. This reset trick requires a lot of complex peripheral circuits to cooperate, resulting in increased costs, complicated circuits, and PCB space occupation.

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