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Verification platform and system

A verification platform and program downloading technology, which is applied to TV system parts, TV, color TV parts, etc., can solve the problem that high-definition digital video interface IP is difficult to accurately verify high-definition digital video interface IP, etc.

Active Publication Date: 2015-12-30
ANALOGIX CHINA SEMICON +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The embodiment of the present invention provides a verification platform and system to at least solve the technical problem that it is difficult to accurately verify the high-definition digital video interface IP caused by the absence of a dedicated verification platform for the high-definition digital video interface IP in the related art

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  • Verification platform and system

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Embodiment 1

[0029] According to an embodiment of the present invention, a device embodiment of a verification system is provided.

[0030] The verification system includes: a verification platform. Among them, the verification platform includes: programmable logic gate array FPGA, used to design and verify the intellectual property IP core corresponding to the integrated circuit design of the high-definition digital video interface; The program is downloaded to the FPGA.

[0031] Optionally, the above-mentioned verification platform may also be the verification platform in the technical solution provided by any preferred implementation manner in the following embodiment 2, which will not be repeated here.

[0032] figure 1 is a schematic diagram of an optional verification system according to an embodiment of the present invention, such as figure 1 As shown, the system includes: a verification platform 10 and a host computer 20 . During implementation, the host computer 20 can directl...

Embodiment 2

[0037] According to an embodiment of the present invention, a device embodiment of a verification platform is provided.

[0038] Figure 7 is a schematic diagram of an optional verification platform according to an embodiment of the present invention, such as Figure 7 As shown, the verification platform 10 includes: a programmable logic gate array FPGA102 (such as XilinxVirtex-6XC6VLX240T), which is used to carry out the intellectual property IP core (hereinafter referred to as the high-definition digital video interface IP) corresponding to the integrated circuit design of the high-definition digital video interface. Design verification; the program download interface 104 is connected with the FPGA102, and is used for downloading the program corresponding to the IP core into the FPGA102.

[0039] combine figure 1 and Figure 7 , the upper computer 20 can directly download the high-definition digital video interface IP to the FPGA 102 through the program download interface...

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Abstract

The invention discloses a verification platform and system. The verification platform comprises a programmable logic gate array (FPGA) and a program download interface, wherein the FPGA is used for conducting design verification on an intellectual property (IP) nucleus corresponding to integrated circuit design of a high-definition digital video interface; the program download interface is connected with the FPGA, and used for downloading the program corresponding to the IP nucleus into the FPGA. The technical problem that in correlation techniques, as no special verification platform aiming at the high-definition digital video interface IP is provided, the high-definition digital video interface IP is hard to verify accurately, is solved.

Description

technical field [0001] The invention relates to the field of circuit design verification, in particular to a verification platform and system. Background technique [0002] Generally, the intellectual property (IntellectualProperty, referred to as IP) core used for the reusable design of an integrated circuit must be programmed in a Field Programmable Gate Array (Field Programmable Gate Array, Design verification is carried out on the FPGA platform, and the IP core design can only be frozen after the verification is passed, and then enter the tape-out stage. [0003] For example, when designing a high-definition digital video interface, before making an IPASIC chip, it is generally necessary to test the IP core used to describe the high-definition digital video interface and the high-definition digital display interface (DisplayPort, referred to as DP) and high-definition multimedia interface (HighDefinitionMultimediaInterface, referred to as HDMI) corresponding to the sign...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N17/00H04N5/765
Inventor 郭方正
Owner ANALOGIX CHINA SEMICON
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