Multi-bit full adder based on resistive switching device and its operation method

Abstract

A full adder based on a resistive switching device and an operation method thereof are disclosed. A multi-bit full adder circuit is formed by using a cross-array based on resistive switching devices, in which the original bit and data are non-volatile stored on the main diagonal of the cross-array, and the carry data is stored in adjacent units on both sides of the main diagonal. Carry data is stored using the connectivity of the storage loop (crosstalk loop). This technique greatly simplifies the multi-bit full adder circuit. Reduce the additional circuit generated by the carry signal, reduce the circuit delay and chip area, and make the adder have the ability of non-volatile storage.

Description

technical field [0001] The technology relates to the technical field of semiconductor integrated circuits, in particular to a multi-bit full adder based on a cross array of resistive switching devices and an operation method thereof. Background technique [0002] Although the current mainstream of non-volatile memory: NAND flash memory has advantages such as high density and low cost, NAND flash memory faces insufficient erasing and writing times (<1e5), slow writing speed (~1ms), high operating voltage (~15V), The research on new memory that can replace NAND flash memory has never stopped due to many problems such as the difficulty of continuing to reduce the size. Among them, the resistive variable device is easy to shrink due to its high erasable times (>1e9), fast erasing speed (~10ns), low operating voltage (<3V), and simple process and CMOS compatibility (unit footprint ~4F 2 ) and many other advantages have attracted extensive attention from the research com...

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Problems solved by technology

[0006] The adder used in the current digital circuit is mainly implemented by CMOS logic circuit. There are many ways to realize it, such as complementary pass logic (CPL), double pass logic (DPL), etc. A one-bit full adder realized by CMOS logic needs About 20 transistors, to form a full adder of four or more digits usually requires more than a linearly increasing number of transistors, occupying a large chip area, and the use of a large number of transistors also makes it difficult to reduce power consumption

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