Formation method of semiconductor device

Abstract

The invention provides a formation method of a semiconductor device. The method comprises the following steps: forming a pseudo grid material layer including a multilayer structure on a semiconductor substrate; and etching the pseudo grid material layer to enable the etching rate of each layer in a multilayer structure to be successively progressively decreased from bottom to top so as to form a pseudo grid structure with a width progressively increased from bottom to top. According to the invention, since the width of the pseudo structure is successively progressively increased from bottom to top, the dimension of a formed grid opening is successively progressively increased from bottom to top, accordingly, when the grid opening is filled with a metal material in the process for forming an NMOS metal gate so as to form the metal gate, even if the stress of the metal material enables the conductive width of a lower end to be greater than the width of an upper end in the metal material, a structure based on the grid opening can effectively alleviate the difference between the upper-end width and the lower-end width of a finally formed metal material, the structure form of the NMOS metal gate is improved, and the performance of the NMOS metal gate is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a semiconductor device. Background technique [0002] With the development of integrated circuit manufacturing technology, the feature size of integrated circuits continues to decrease, and the degree of integration continues to increase, while the quality requirements for various electrical components in integrated circuits are becoming more and more stringent. The integrated circuit manufacturing process is also constantly innovating to improve the quality of the manufactured integrated circuit electrical components. [0003] For example, in the gate preparation process of COMS, the gate last process has gradually replaced the gate first process to improve the quality of the gate. The so-called gate-front process means that after the gate opening is formed in the dielectric layer of the semiconductor substrate, the gate material is directly filled i...

AI Technical Summary

Problems solved by technology

[0005] However, in the gate-last process of NMOS transistors, after the metal material is filled into the NMOS gate opening, the NMOS metal gate is prone to deformation, resulting in poor stability, thereby reducing the overall performance of the formed semiconductor device.

Images