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Quadrature phase shift keying (QPSK) carrier synchronous lock detector

A carrier synchronization and detector technology, applied in the direction of synchronization signal speed/phase control, etc., can solve the problems of high false positive rate, easy false lock by threshold method, complicated implementation of statistical method, etc., to achieve accurate detection and judgment results, wide signal-to-noise Accurate and reliable effect of ratio range and detection judgment results

Active Publication Date: 2016-03-09
10TH RES INST OF CETC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the above traditional processing, the statistical method is more complicated to implement and has a high misjudgment rate under low SNR, and the threshold method also has the disadvantage of being prone to false locks under low SNR. In engineering applications in fields such as

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  • Quadrature phase shift keying (QPSK) carrier synchronous lock detector
  • Quadrature phase shift keying (QPSK) carrier synchronous lock detector

Examples

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Embodiment Construction

[0010] exist figure 1 In one of the best embodiments described, the QPSK carrier lock detector mainly includes: a carrier synchronization loop NCO circuit, a QPSK signal distribution statistics circuit for realizing the output signal probability characteristic and a dynamic comparison for realizing the locking decision of the carrier loop circuit. In other words, the carrier sync lock detector is composed of an integral clear filter, an absolute value circuit, two interval statistics circuits, a multiplier, a comparator and a carrier sync loop NCO circuit. Among them, the QPSK signal distribution statistics circuit is respectively connected to the dynamic comparison circuit and the carrier synchronization loop NCO circuit. The circuit outputs a control pulse, and the integral clear filter performs an integral clear operation on the input zero-IF branch signal under the action of the control pulse. The statistical results of the amplitude distribution of the intervals, in whi...

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Abstract

The invention provides a quadrature phase shift keying (QPSK) carrier lock detector, and aims to provide a device which can realize QPSK carrier synchronous loop lock indication. The QPSK carrier lock detector is realized through a technical solution which is characterized in that a carrier synchronous loop numerically controlled oscillator (NCO) circuit outputs a control impulse; an integrated number clearing filter performs integrated number clearing operation on an input zero intermediate frequency branch signal in response to a control impulse; an amplitude distribution statistics result of a signal in two intervals is obtained from an integrated number clearing operation result through an absolute value circuit and two interval statistics circuits; an operation result of a first interval is obtained through multiplying the statistics result of the first interval by a lock threshold coefficient; an operation result of a second interval is directly used as the operation result of the second interval; the operation results of the two intervals are simultaneously input into a comparator; the operation results from the two intervals are compared; and an indication which determines whether the QPSK carrier synchronous loop is locked is output. Compared with an existing QPSK carrier synchronous lock detecting method, the QPSK carrier synchronous lock detector has advantages of wider signal-to-noise range and lock indication with lower determination error rate.

Description

technical field [0001] The invention relates to a lock detector which utilizes distribution probability to judge the synchronization of quadrature phase shift keying QPSK carrier in a digital coherent communication system. Background technique [0002] In the downlink channel of the digital communication system, due to the influence of the channel characteristics and the instability of the oscillator, there will be a certain frequency offset and phase error between the modulated signal received by the system and the local carrier. Modulate the coherent carrier with the same frequency and phase to realize coherent demodulation, and eliminate the frequency and phase errors between the local carrier and the received signal to ensure the correctness of demodulation. The performance of carrier synchronization directly affects the performance of the entire receiver, so carrier synchronization technology is one of the key technologies of the receiver. In the realization of carrier...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L7/06
CPCH04L7/06
Inventor 曾富华熊沛
Owner 10TH RES INST OF CETC
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