Serial peripheral interface
A serial peripheral interface and signaling technology, applied in the communication field of serial peripheral interface, to achieve the effect of reducing communication delay
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[0034] figure 1 A system comprising a master device 10 and three slave devices 1 , 2 , 3 is schematically shown. The devices 1 , 2 , 3 , 10 are connected via a serial peripheral interface (SPI) 20 . The SPI 20 includes an interface 28, 29 at each of the devices 1, 2, 3, 10 to support a line 21 between the devices and the interface to carry signals. The wire 21 may be a conductive track between the devices 1 , 2 , 3 , 10 . The SPI includes: a serial clock (SCLK) line 22 , a master out slave in (MOSI) line 23 , and a master in slave out (MISO) line 24 . The SCLK, MOSI, and MISO lines are connected between the master device 10 and all slave devices 1-3. The SPI also includes a slave select (SS) line, one for each slave device. From device 1 is the first SS line 25 , from device 2 is the second SS line 26 , and from device 3 is the third SS line 27 . Another name for a slave select line is a chip select line. The interface 28, 29 at each device may include circuitry physical...
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