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Serial peripheral interface

A serial peripheral interface and signaling technology, applied in the communication field of serial peripheral interface, to achieve the effect of reducing communication delay

Active Publication Date: 2016-04-06
艾德米亚法国
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that it requires additional wires and additional input / output processing at the master

Method used

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Examples

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Embodiment Construction

[0034] figure 1 A system comprising a master device 10 and three slave devices 1 , 2 , 3 is schematically shown. The devices 1 , 2 , 3 , 10 are connected via a serial peripheral interface (SPI) 20 . The SPI 20 includes an interface 28, 29 at each of the devices 1, 2, 3, 10 to support a line 21 between the devices and the interface to carry signals. The wire 21 may be a conductive track between the devices 1 , 2 , 3 , 10 . The SPI includes: a serial clock (SCLK) line 22 , a master out slave in (MOSI) line 23 , and a master in slave out (MISO) line 24 . The SCLK, MOSI, and MISO lines are connected between the master device 10 and all slave devices 1-3. The SPI also includes a slave select (SS) line, one for each slave device. From device 1 is the first SS line 25 , from device 2 is the second SS line 26 , and from device 3 is the third SS line 27 . Another name for a slave select line is a chip select line. The interface 28, 29 at each device may include circuitry physical...

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PUM

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Abstract

A Serial Peripheral Interface (20) connects a master device (10) and at least one slave device (1-3). The Serial Peripheral Interface (20) comprises a slave select line (25). The slave device (1) can signal an interrupt request to the master device (10) by changing a state of the slave select line (25) from a first state indicative of an inactive state to a second state indicative of an active state. The slave select line (25) can be connected to an input / output stage (52) of the slave device (1) which: allows the slave select line (25) to remain in the first state if the master device (10) or the slave device (1) does not change the state of the slave select line (25); and allows the slave select line (25) to change to the second state if the master device (10) or the slave device (1) wants to change the state of the slave select line (25).

Description

technical field [0001] The present invention relates to communication using a serial peripheral interface. Background technique [0002] A serial peripheral interface (SPI) is a serial data link that allows communication between a master device and one or more slave devices. [0003] The serial peripheral interface consists of four lines: Serial Clock (SCLK), Master Out Slave In (MOSI), Master In Slave Out (MISO), and Slave Select (SS). Lines SCLK, MOSI and MISO are connected between the master and all slaves. Each slave device has a dedicated SS line. The SS line is used by the master device to signal to the slave device that the slave device is currently selected for communication. [0004] The master device can poll the slave devices individually to determine whether they have data to send. Another approach is to provide additional wires between the slave and the master. This additional line can be used from the slave to signal an interrupt request to the master. Th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/26G06F13/38G06F13/42
CPCG06F13/26G06F13/382G06F13/4282G06F2213/2418G06F2213/0002G06F13/4291
Inventor O·尚蕾N·莫金
Owner 艾德米亚法国