Array substrate and manufacturing method therefor, and display apparatus

Abstract

The invention provides an array substrate and a manufacturing method therefor, and a display apparatus. The array substrate comprises multiple pattern layers in a display region and a test unit in a non-display unit, wherein the test unit comprises at least onetest assembly and test transistors; the test assemblies comprise test block patterns and test line patterns; the test block patterns and one layer of the multiple pattern layers are arranged on the same layer; the test line patterns and one layer of the multiple pattern layers are arranged on the same layer, and the test block patterns and the test line patterns are positioned on different layers; the periphery of the orthographic projection of the test block patterns is surrounded by the orthographic projection of the test line patterns on the array substrate; and the test block patterns or the test line patterns are connected with the test transistors. According to the array substrate, the integration testing for the pattern dimensions of the multiple pattern layers and the mutual overlaying degrees of the multiple pattern layers in the display region can be realized; and the integration testing on the characteristics of the transistors in the display region can be realized as well, so that the technology test cost is lowered and the technology test timeliness is improved.

Description

technical field [0001] The present invention relates to the field of display technology, in particular, to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] As people's demand for high-resolution displays is getting higher and higher, high-resolution display products have higher and higher requirements for process capabilities. Therefore, the timeliness requirements for process capability testing during the display manufacturing process are also relatively increased. [0003] Especially for polysilicon display devices with a top-gate structure, due to the large number of exposures in the manufacturing process of the display device, the process is relatively complicated. If the process cannot be immediately reflected in the production process, the product will be damaged. The production cost and time are greatly wasted, which requires monitoring the stability and accuracy of the process during or after the process. [000...

AI Technical Summary

Problems solved by technology

[0005] The existing test unit is to design multiple test elements on different layers in the non-display area. Among these test elements, they are used to test the line width of the signal line, the overlap between the upper and lower conductive film layers, and the long channel and short channel. The test elements of the transistor characteristics of the channel are set independently, and the distribution of the test elements in the non-display area is scattered, which not only increases the occupied space of the test elements in the non-display area, which is not conducive to saving the preparation cost, but also in the When testing different process parameters, it is necessary to frequently move the test equipment (such as optical test equipment and electrical test equipment), which greatly reduces the test efficiency and increases the test cost

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