Three-level inverter protection device and three-level inverter

Abstract

The invention discloses a three-level inverter protection device and a three-level inverter. The three-level inverter protection device comprises an interlocking unit, a protection reset unit and a positive buffer unit. A switch interlocking module of the interlocking unit receives a PWM driving signal so as to output an interlock driving signal. A complementary logic module performs true-false logic computing on the PWM driving signal so as to generate a PWM complementary state signal. An error reporting signal module of the protection reset unit receives the PWM complementary state signal and a sampling trigger signal, when one of the signals is in an error reporting state, a judgment signal output by the error reporting signal module is an error reporting state, and an error reporting processing module blocks the positive buffer unit. In the driving interlock design aiming at I type and T type three-level photovoltaic inverters, the three-level inverter protection device and the three-level inverter can avoid accidents of damage to a power device because a driving signal is sent by mistake or a protection circuit does not act timely when the PWM complementary state signal or the sampling trigger signal is in the error reporting state.

Description

technical field [0001] The invention relates to the technical field of an inverter inverter control circuit and its logic protection circuit, in particular to a protection device for a three-level inverter and a three-level inverter. Background technique [0002] The application of three-level technology in the field of photovoltaic inverters is becoming more and more extensive. During the operation of photovoltaic inverters, there are usually various faults, among which the more serious faults are failures, and the main cause of failures is usually The bridge arm of the inverter unit of the photovoltaic inverter is directly connected. Most of this kind of through-through is caused by incorrect driving rules, abnormal driving, or program runaway due to unstable power supply of the control system. In addition, the serious delay of the protection circuit and untimely protection will also cause this kind of through-through. [0003] In the prior art, a circuit unit with an int...

AI Technical Summary

Problems solved by technology

The invention patent with the publication number CN102710116A discloses a PWM drive interlock circuit for two-level three-phase inverters. When DPPWMUT=1, DPPWMUB=1, and INVEN=1, the DSPOGATED resistor RVUHI=0, but the DSPOGATED resistor RVULO=1, the lower tube will still be turned on, and complete lockup cannot be achieved, and the DSP cannot know whether there is a logic error in the PWM drive signal, resulting in the inverter still working abnormally. Inverter PWM drive interlock circuit

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