Quick clock synchronization method for EtherCAT master station control system

Abstract

The invention discloses a quick clock synchronization method for an EtherCAT master station control system. The quick clock synchronization method includes the steps: realizing quick clock synchronization by means of a clock frequency following method; setting a fixed period timing thread and a changeable period timing thread, and respectively processing the aperiodic data and the periodic data; and completing the clock frequency following function by changing the period of the changeable period timing thread. The quick clock synchronization method realizes synchronization of an EtherCAT master station and a reference clock, and can avoid the packet loss problem caused by clock asynchronization. The quick clock synchronization method utilizes the frequency following method to realize quick clock synchronization, avoids the influence of overlarge overshoot and uncertainty of settling time in the other clock synchronization methods on system performance, and can accurately and quickly track the operation frequency of the reference clock. The quick clock synchronization method utilizes the method of changing the operation frequency of the master station clock to realize clock synchronization, avoids time loss caused replacement of moment, and can guarantee stable operation of the system.

Description

technical field [0001] The invention relates to the field of industrial automation, in particular to a fast clock synchronization method for an EtherCAT master station control system. Background technique [0002] In a distributed motion control system, clock synchronization is the basis for ensuring the coordination between the controller and each execution end, and between each execution end. EtherCAT adopts the principle of distributed clock to keep the clock of each slave station synchronized with the reference clock (usually the first EtherCAT slave station supporting the distributed clock function in the logical ring topology), and the synchronization accuracy can reach 1us. However, the clock synchronization function of the EtherCAT distributed clock is realized by a dedicated hardware logic module, and the method is not applicable to the EtherCAT master station implemented on the PC. At the same time, in the field of motion control that requires high speed, precisio...

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to overcome the problem of packet loss caused by the asynchrony between the EtherCAT master station and the reference clock in the prior art and

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