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Methods and apparatus for embedding an error correction code in memory cells

A memory unit and error technology, applied in static memory, error detection/correction, data representation error detection/correction, etc., can solve problems such as single event flip effects, bad connections, etc.

Active Publication Date: 2016-10-12
ALTERA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Single event upsets in memory elements storing configuration data bits can have severe consequences
For example, look-up tables (LUTs) can implement different logic functions or routing multiplexers can cause bad connections

Method used

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  • Methods and apparatus for embedding an error correction code in memory cells
  • Methods and apparatus for embedding an error correction code in memory cells
  • Methods and apparatus for embedding an error correction code in memory cells

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 3

[0137] Additional Example 3. The method of additional embodiment 1, further comprising: computing second error checking bits for the second subset of configuration data stored in the second subset of the configuration memory cells, wherein the first of the configuration memory cells and the second subset overlap in common predetermined configuration memory cells.

[0138] Additional Example 4. The method of additional embodiment 3, wherein the second subset of configuration data is stored in a column of configuration memory cells of the array.

[0139] Additional Example 5. The method of additional embodiment 3, further comprising: storing the second error checking bit in a second configuration memory cell in the unrelated subset of configuration memory cells.

[0140] Additional Example 6. The method of additional embodiment 5, further comprising: associating a first location with the first configuration memory cell; and selecting a second location for the second configur...

Embodiment 13

[0147] Additional Example 13. A method for processing configuration data, the configuration data implementing a circuit design on an integrated circuit, the method comprising: receiving the configuration data; identifying a set of don't care bits in the configuration data, wherein at any one of the don't care bits A polarity change in the circuit design preserves the functionality of the circuit design; computes parity bits for the subset of configuration data; generates updated configuration data by substituting the parity bits for bits in the set of irrelevant bits; and The updated configuration data programs configuration memory cells on the integrated circuit.

[0148] Additional Example 14. The method of additional embodiment 13, wherein generating the updated configuration data further comprises computing additional parity bits for an additional subset of the configuration data, wherein the subset of the configuration data and the additional subset Sets share a common ...

Embodiment 19

[0153]Additional Example 19. A non-transitory computer-readable storage medium for processing a circuit design implemented on a programmable circuit, the non-transitory computer medium comprising instructions for: receiving the circuit design; in the programmable circuit saving a first subset of configuration memory cells for storing error checking bits; generating configuration data to program a second subset of configuration memory cells in the programmable circuit, wherein the configuration data is in the programmable circuit Implementing the circuit design and wherein the first and second subsets are disjoint; identifying a don't care subset of configuration memory cells in a second subset of configuration memory cells, the configuration memory cells storing don't care bits, wherein the don't care The polarity change of the bits preserves the function implemented by the circuit design in the programmable circuit; and the configuration data is coded for error checking.

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Abstract

A computer-aided design (CAD) tool may identify don't care bits in configuration data. The don't care bits in the configuration data may change polarity without affecting the functionality of the circuit design. The CAD tool may compute an error check code (e.g., parity bits for a two-dimensional parity check) and insert the error check code into the configuration data. As an example, the CAD tool may replace don't care bits in the configuration data with the error code. The configuration data may be stored in configuration memory cells on a programmable integrated circuit, thereby implementing the circuit design with the error code on the programmable integrated circuit. During execution, the programmable integrated circuit may execute error checking and detect and correct errors in the configuration data based on the embedded error code.

Description

[0001] This application claims priority to US Patent Application No. 14 / 675,294, filed March 31, 2015, the entire contents of which are incorporated herein by reference. technical field [0002] The present invention relates to memory bit corruption, and more particularly to detecting and correcting memory bit corruption in integrated circuits. Background technique [0003] Today's integrated circuits often include memory elements. In some arrangements, memory elements are used to store configuration data in an integrated circuit. For example, memory elements may be used to store configuration data in programmable integrated circuits. A programmable integrated circuit is a general-purpose integrated circuit that can be customized, at least in part, to implement a desired circuit design (eg, by loading predetermined configuration data into memory elements). [0004] Integrated circuits are affected by a phenomenon known as single event upset (SEU). A single event flip is a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/398G06F11/1012G06F30/34H03M13/05G06F11/0787G06F11/1044G06F11/1004G06F11/1068G11C29/52
Inventor H·H·施密特M·D·赫顿
Owner ALTERA CORP
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