Fabrication method of wafer-level uniaxial strain GE on Aln buried insulating layer based on silicon nitride stress film and scale effect

Abstract

The invention discloses a manufacturing method for the wafer-level uniaxial strain Ge on an AlN buried insulating layer based on a silicon nitride stress thin film and scale effect. The manufacturing method is implemented by the steps of 1, cleaning a GeOI wafer, and performing He ion implantation; 2, depositing a SiN thin film with the pressure stress of greater than minus 1GPa or an SiN thin film with the tensile stress of greater than 1GPa on the Ge layer on the top layer of the GeOI wafer after ion implantation, and etching the SiN thin film to form a strip-shaped array; 3, performing annealing processing on the GeOI wafer with the SiN thin film array; and 4, etching and removing the SiN thin film array from the surface of the GeOI wafer to obtain the wafer-level uniaxial strain GeOI material. According to the manufacturing method, due to the uniaxial stretching or uniaxial compression plastic deformation of the AlN buried insulating layer under the effect of the strip-shaped SiN thin film, strain is introduced to the Ge layer on the top layer, so that the wafer-level uniaxial strain Ge can be used for manufacturing the GeOI wafers required by the high-temperature, high-power-consumption and high-power integrated circuits.

Description

technical field [0001] The invention belongs to the field of microelectronics technology, and relates to a semiconductor substrate material manufacturing process technology, specifically a method for manufacturing a wafer-level uniaxially strained Ge material on an AlN buried insulating layer, which can be used for manufacturing high temperature, large power consumption, high GeOI wafers required for power integrated circuits. Background technique [0002] It is well known in the industry that the mobility of electrons and holes of the semiconductor Ge is 2.8 times and 4.2 times that of Si, respectively, and its hole mobility is the highest among all semiconductors. The strained Ge technology that introduces strain technology into Ge devices and integrated circuits can significantly improve carrier mobility, for example, the hole mobility of strained Ge buried trenches can be increased by 6-8 times. Therefore, Ge and strained Ge will be the best channel materials for Si-bas...

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Problems solved by technology

[0012] However, this method has the following disadvantages: 1) Poor compatibility with traditional integrated circuit technology: In order to obtain GeOI with different strains, this method needs to make additional bending tables with different curvature radii, and the manufactured bending tables need to be compatible with existing With annealing equipment

2) Poor reliability: This process requires the use of pressure rods to apply mechanical force to bend the GeOI wafer, which will introduce defects into the top layer of Ge; if the GeOI wafer bends too much, it will cause wafer fragmentation

3) Due to the fear of breaking the GeOI wafer, the bending degree of the mechanical bending cannot be too large, which limits the amount of strain introduced in the top layer Ge, and the amount of strain that can be achieved is small

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