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Verification Environment Platform for Memory Controllers

A technology of memory controller and verification environment, applied in the direction of detecting faulty computer hardware, etc., can solve the problems of spending a lot of time, time-consuming full-chip reading and writing, easy to hide, etc., to shorten the time for locating problems, The effect of reducing the difficulty of verification and reducing the introduction of human error

Active Publication Date: 2019-10-01
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

The traditional verification method is to test whether the memory and memory controller are working normally from the perspective of the user. Once a problem occurs, it is difficult to locate and analyze it, and it is easy to hide the problem during data transmission
Therefore, using traditional methods to verify memory controllers and memories, verifiers have to spend a lot of time analyzing positioning problems
In addition, the existing memory generally has a large capacity, and it takes a long time to read and write the entire chip. Randomized verification can solve some marginal problems, but a more accurate and detailed reference model is required for inspection.

Method used

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  • Verification Environment Platform for Memory Controllers

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specific Embodiment

[0039] When the test sequence unit initiates a write operation, the memory reference model inside the test sequence unit updates the data in real time, and the write operation is sent to the bus module for execution, and no problem can be found from the perspective 1. If there are only write operations and no read operations in the test stimulus, it may hide the problem.

[0040] The bus module initiates a write operation, and the bus interface data monitor collects the data included in the write operation. The memory controller translates the write operation into a signal that the memory can recognize and sends it out through the memory interface. The translated signal collected by the memory interface is compared with the signal collected by the memory controller bus interface. If it is correct, the memory reference model inside the scoreboard is updated. If it is wrong, it can be judged immediately by viewing the log file. Whether it is a problem with checkpoint 1 or a pro...

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Abstract

The invention discloses a verification environment platform of a storage controller, which comprises a test sequence unit, a bus module, a bus interface data monitor, a storage interface data monitor and a scoreboard. One independent storage reference model is respectively adopted in the test sequence unit and the scoreboard to carry out data recording. The test sequence unit generates a series of test requirements and sends the test requirements to the bus module, and the bus module excites a DUT according to the test requirements by a storage controller bus interface. The storage interface data monitor collects data obtained after the storage controller access a storage and data fed back by the storage by a storage interface, and sends the collected data to the scoreboard. The bus interface data monitor collects data transmitted between the bus module and a design module to be tested by the storage controller bus interface, and sends the collected data to the scoreboard. The scoreboard compares the collected data. According to the verification environment platform disclosed by the invention, verification efficiency can be effectively improved, and time of positioning a problem is shortened.

Description

technical field [0001] The invention relates to a verification environment platform of a memory controller. Background technique [0002] Due to the special timing requirements of the memory, a memory controller is often used to operate the memory in chip design, and the memory used is different according to the specific requirements of the chip. The traditional verification method is to test whether the memory and memory controller are working normally from the perspective of the user. Once a problem occurs, it is difficult to locate and analyze it, and it is easy to hide the problem during data transmission. Therefore, verifying the memory controller and memory with the traditional method, the verification personnel have to spend a lot of time to analyze the positioning problem. In addition, the existing memory generally has a large capacity, and it takes a long time to read and write the entire chip. Randomized verification can solve some marginal problems, but a more ac...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/22
Inventor 范先奇李颖聃周璞
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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