Clock data recovery circuit

A clock data recovery and circuit technology, applied in the field of communication, can solve the problem that the data clock recovery circuit cannot meet the three-phase requirements

Inactive Publication Date: 2017-02-08
OMNIVISION TECH (SHANGHAI) CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Correspondingly, it is necessary to design a clock data recovery (CDR) circuit to recover clock and data. Since C-PHY uses three-phase signal technology to transmit data, the existing

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Embodiment Construction

[0026] The clock data recovery circuit proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0027] Please refer to figure 1 , which is a schematic structural diagram of the clock data recovery circuit of the present invention. Such as figure 1 As shown, the clock data recovery circuit is suitable for the receiving end of the C-type physical layer protocol (C-PHY) of the mobile industry processor interface (MIPI), and the receiving end of the C-type physical layer protocol of the mobile industry processor interface Including three differential receivers, the ...

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Abstract

The invention provides a clock data recovery circuit, and the circuit comprises a pulse detection circuit and a sampling circuit. The pulse detection circuit is used for carrying out the pulse detection and integration of a three-phase signal which is received by a receiving end and outputted by a mobile industry processor interface C-type physical layer protocol transmitting end, so as to recover a clock signal; The sampling circuit is used for carrying out the data sampling of the three-phase signal, which is received by the receiving end and outputted by the mobile industry processor interface C-type physical layer protocol transmitting end, based on pulse detection circuit recovery. The circuit carries out the pulse detection and integration of the three-phase signal, which is received by the receiving end and outputted by the mobile industry processor interface C-type physical layer protocol transmitting end, through employing the characteristics of the clock information in the three-phase signal, so as to recover the clock signal, thereby carrying out the sampling of the data through the recovered clock signal, and achieving the recovery of data. The whole circuit is simple in structure, and optimizes the recovered data and the jitter performance of a clock.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a clock data recovery circuit. Background technique [0002] With the continuous increase of people's needs and the number of various portable mobile devices, the amount of data transmission on communication links has increased exponentially, which requires a sharp increase in the speed and reliability of wired communication systems, especially data transmission. Therefore, as the core of data transmission equipment and facilities, high-speed serial communication technology needs to be greatly improved in speed, power consumption and reliability. As the most important part of the receiving end of high-speed serial communication, the clock data recovery circuit determines the quality of the clock at the receiving end of the entire system and the jitter and bit error rate of the recovered data. [0003] At present, there are many standard protocols for high-speed serial data...

Claims

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Application Information

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IPC IPC(8): H03L7/08H03L7/095
CPCH03L7/0807H03L7/095
Inventor 谢治中刘慜吴卿乐
Owner OMNIVISION TECH (SHANGHAI) CO LTD
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