Unlock instant, AI-driven research and patent intelligence for your innovation.

A kind of manufacturing method of wafer package structure

A manufacturing method and wafer packaging technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as device failure, achieve guaranteed interference, large heat dissipation layer area, and improve heat dissipation efficiency Effect

Active Publication Date: 2018-12-04
博兴县星烨物流有限公司
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Finally, due to the continuous improvement of integration, a large amount of heat will be generated on the wafer substrate of high-density devices. When the heat is too large and the temperature is too high, it will cause the failure of the device. Therefore, the heat dissipation performance of the package must also be considered question

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of manufacturing method of wafer package structure
  • A kind of manufacturing method of wafer package structure
  • A kind of manufacturing method of wafer package structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] see figure 1 , the present invention provides a wafer packaging structure, comprising:

[0028] a semiconductor substrate 10 having opposite upper and lower surfaces;

[0029] A plurality of pads 11 located on the upper surface;

[0030] A plurality of solder balls 13 located on the plurality of pads;

[0031] a solder resist layer 12 surrounding the plurality of pads 11 and solder balls 13;

[0032] A metal heat conduction layer 14 surrounding the solder resist layer 12, the metal heat conduction layer 14 is only located at the edge of the upper surface;

[0033] a heat dissipation layer 15 located on the lower surface; and

[0034] A plurality of heat conduction vias 16 connecting the metal heat conduction layer 14 and the heat dissipation layer 15 .

[0035] see figure 2 It can be seen that the solder balls 13 are distributed in an array, the solder resist layer surrounds the solder balls 13, the metal heat conduction layer 14 is in the shape of surrounding th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a manufacturing method of a wafer packaging structure. The manufacturing method is characterized by including: (1), providing a semiconductor substrate which has an upper surface and a lower surface which are opposite, wherein multiple welding pads are arranged on the upper surface; (2), forming a solder mask covering the upper surface, wherein the solder mask is exposed out of the welding pads and exposed out of the edge of the upper surface; (3), forming multiple welding balls on the welding pads; (4), forming a metal heat-conducting layer surrounding the solder mask at the edge, uncovered by the solder mask, of the upper surface; (5), forming multiple heat-conducting through holes connected with the metal heat-conducting layer and penetrating the upper surface and the lower surface; (6), forming a heat radiating layer covering the lower surface.

Description

technical field [0001] The invention relates to a semiconductor package, in particular to a method for manufacturing a wafer package structure with a heat dissipation structure. Background technique [0002] The use of packaging technology to minimize the size of electronic components and improve product integration (Integration) is a trend in the manufacture of electronic products. At the same time, based on the functional requirements of today's electronic products, the maximum number of electronic components must be installed in the limited space in the product, so the size of the position for installing electronic components in the electronic product is equivalent to the size of the electronic components. Therefore, the appearance tolerance of electronic components has also become an item that needs to be controlled. [0003] Taking the current semiconductor package with a size of 35mm×35mm as an example, the tolerance on one side of the plane of the semiconductor packa...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/48H01L23/367H01L23/373
Inventor 王汉清
Owner 博兴县星烨物流有限公司