A kind of manufacturing method of wafer package structure
A manufacturing method and wafer packaging technology, applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as device failure, achieve guaranteed interference, large heat dissipation layer area, and improve heat dissipation efficiency Effect
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[0027] see figure 1 , the present invention provides a wafer packaging structure, comprising:
[0028] a semiconductor substrate 10 having opposite upper and lower surfaces;
[0029] A plurality of pads 11 located on the upper surface;
[0030] A plurality of solder balls 13 located on the plurality of pads;
[0031] a solder resist layer 12 surrounding the plurality of pads 11 and solder balls 13;
[0032] A metal heat conduction layer 14 surrounding the solder resist layer 12, the metal heat conduction layer 14 is only located at the edge of the upper surface;
[0033] a heat dissipation layer 15 located on the lower surface; and
[0034] A plurality of heat conduction vias 16 connecting the metal heat conduction layer 14 and the heat dissipation layer 15 .
[0035] see figure 2 It can be seen that the solder balls 13 are distributed in an array, the solder resist layer surrounds the solder balls 13, the metal heat conduction layer 14 is in the shape of surrounding th...
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