Single track current mode one bit full adder based on FinFET device

Abstract

The invention discloses a single track current mode one bit full adder based on a FinFET device. The single track current mode one bit full adder comprises a bias circuit, a summation output circuit, and a carry output circuit. The summation output circuit comprises a third P-type FinFET pipe; a fourth P-type FinFET pipe and a fourth N-type FinFET pipe, which are respectively connected with the third P-type FinFET pipe; a fifth N-type FinFET pipe and a sixth N-type FinFET pipe, which are parallely connected together; a seventh N-type FinFET pipe; a ninth N-type FinFET pipe and a tenth N-type FinFET pipe, which are parallely connected together. The fourth N-type FinFET pipe is connected with the fifth N-type FinFET pipe and the sixth N-type FinFET pipe, which are parallely connected together. The seventh N-type FinFET pipe is connected with the fifth N-type FinFET pipe and the sixth N-type FinFET pipe, which are parallely connected together, and is connected with the ninth N-type FinFET pipe and the tenth N-type FinFET pipe, which are parallely connected together. By adopting a differential single track current mode structure, the N-type FinFET pipes in the pull-down network of the single track current mode adopt the parallel connection structures to realize a multi-input NOR function, and the serial connection configuration of the N-type FinFET pipes is prevented, and therefore circuit performance is optimized, and the circuit can still work normally under conditions of standard voltage and superthreshold.

Description

technical field [0001] The invention belongs to the field of electronic circuits, in particular to a single-rail current modulus one-bit full adder based on a FinFET device. Background technique [0002] With the application of integrated circuit chips in electronic products more and more widely, the power consumption of chips has also received great attention. Improving the working speed and reducing the power consumption of chips has become an important goal of many researchers. With the continuous shrinking of the transistor size, the size of the CMOS process has shrunk to the nanometer range which is difficult to further shrink. When the size of ordinary CMOS transistors is reduced to below 20nm, the leakage current of the device will increase sharply, resulting in a large leakage power consumption of the circuit. Moreover, the short-channel effect of the circuit becomes more obvious, and the device becomes quite unstable, which greatly limits the improvement of the c...

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Problems solved by technology

[0004] like figure 1 As shown, the traditional current mode circuit adopts a dual-rail differential structure. Two resistors R are used as pull-up resistors, and a fully differential pull-down network and a current source are connected underneath. In the dual-rail current mode topology, as the input signal increases, the power supply The stack flowing through is too long, because of the input series structure, the closer to the bottom of the FinFET transistor is divided, the smaller the voltage is, and the voltage at this time is likely to be insufficient to meet the normal working voltage requirements of the FinFET tube. The logic of the entire circuit an error occurred

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