The invention discloses a one-bit full adder based on FinFET devices. The one-bit full adder comprises a sum output circuit and a carry output circuit, the sum output circuit comprises a first FinFET transistor, a second FinFET transistor, a third FinFET transistor, a fourth FinFET transistor, a fifth FinFET transistor, a sixth FinFET transistor, a seventh FinFET transistor, an eighth FinFET transistor, a ninth FinFET transistor, and a tenth FinFET transistor, and the carry output circuit comprises an eleventh FinFET transistor, a twelfth FinFET transistor, a thirteenth FinFET transistor, a fourteenth FinFET transistor, a fifteenth FinFET transistor, a sixteenth FinFET transistor, a seventeenth FinFET transistor, and an eighteenth FinFET transistor. The one-bit full adder is advantageous in that the sum output circuit and the carry output circuit both employs the differential circuits, sum output and carry output are realized via alternative work, and the one-bit adder works in a differential manner so that the static power consumption of the circuits can be completely eliminated; besides, opposite logic output is realized, an extra inverter is not needed for opposite logic so that the number of the transistors is further reduced, the circuit area is small, the time delay is short, the power consumption is low, and the consumption-delay product is small.