Three-stage comparator system suitable for medium-low precision high-speed low-power consumption ADC (Analog to Digital Converter)

A three-level comparison, low-power technology, used in signal transmission systems, electrical signal transmission systems, instruments, etc., can solve problems such as large kickback noise at the input end, achieve low offset voltage, low operating power consumption, and eliminate static Effects of Current and Static Power Dissipation

Pending Publication Date: 2022-06-28
重庆中易智芯科技有限责任公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The dynamic comparator mainly includes a latch and a preamplifier. Some high-precision configurations also have an additional offset cancellation circuit, but at the same time, a relatively large kickback noise will be introduced at the input.

Method used

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  • Three-stage comparator system suitable for medium-low precision high-speed low-power consumption ADC (Analog to Digital Converter)
  • Three-stage comparator system suitable for medium-low precision high-speed low-power consumption ADC (Analog to Digital Converter)
  • Three-stage comparator system suitable for medium-low precision high-speed low-power consumption ADC (Analog to Digital Converter)

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Embodiment Construction

[0028] The technical solutions in the embodiments of the present invention will be described clearly and in detail below with reference to the accompanying drawings in the embodiments of the present invention. The described embodiments are only some of the embodiments of the invention.

[0029] The technical scheme that the present invention solves the above-mentioned technical problems is:

[0030] like figure 1 , figure 2 As shown, a three-stage comparator system suitable for low-to-medium-precision, high-speed, low-power ADCs includes a first-stage four-input two-output dynamic small-signal preamplifier, and a second-stage two-input two-output dynamic small-signal preamplifier. A three-stage comparator structure composed of an amplifier and a latch, where,

[0031] The dynamic small-signal preamplifier includes an input differential pair tube, a tail charge source and a charge steering branch. The charge steering branch uses a capacitor as an energy storage element, and...

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Abstract

The invention requests to protect a three-stage comparator system suitable for an ADC (Analog to Digital Converter) with medium and low precision, high speed and low power consumption, which comprises a first-stage four-input two-output dynamic small signal preamplifier, a second-stage two-input two-output dynamic small signal preamplifier and a latch, wherein the dynamic pre-amplifier comprises an input differential pair transistor, a tail charge source and a charge steering branch; the latch includes an input stage, a latch stage, and an output stage. The invention aims to improve all modules in a comparator circuit into a dynamic structure, so that the circuit is in an open-circuit state when no control time sequence is input, quiescent current is eliminated, and the power consumption is further reduced. And on the other hand, the offset voltage of the input end of the comparator is reduced through the gain multiple of the two-stage dynamic preamplifier, so that the precision of the comparator is guaranteed. The innovation point lies in that compared with a traditional architecture, the full-dynamic three-level structure has a remarkable effect of reducing the circuit power consumption and the offset voltage on the basis of the full-dynamic three-level structure.

Description

technical field [0001] The invention belongs to the field of analog integrated circuits, and mainly relates to a structure of changing a traditional static comparator structure to a fully dynamic two-stage small-signal preamplifier, and utilizing the fast response of the dynamic small-signal preamplifier and its own certain gain features to improve the operating speed of the comparator, reduce the circuit offset voltage, and reduce static power consumption. Background technique [0002] With the rapid development of modern CMOS integrated circuit technology, the society's demand for analog integrated circuits has not been completely replaced by digital circuits as predicted by experts at the end of the last century, but has shown a booming trend. The reason is that the use of circuits In the process of work, it is inevitable to encounter the conversion between analog signals and digital signals. The signals in nature are analog quantities from a macro perspective, while the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/24H03M1/00H03M1/12
CPCH03K5/2481H03M1/002H03M1/124
Inventor 王巍赵汝法熊德宇樊琦
Owner 重庆中易智芯科技有限责任公司
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