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Method for Managing the Write Cycle of an EEPROM

A write cycle and duration technology, applied in the memory field, can solve problems such as lack of efficiency

Active Publication Date: 2017-04-05
STMICROELECTRONICS (ROUSSET) SAS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

They are thus inefficient at high voltages and require considerable area

Method used

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  • Method for Managing the Write Cycle of an EEPROM
  • Method for Managing the Write Cycle of an EEPROM
  • Method for Managing the Write Cycle of an EEPROM

Examples

Experimental program
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Embodiment Construction

[0067] figure 1 A memory device DIS of the EEPROM type according to the invention is schematically represented.

[0068] The device DIS is powered by a power source ALIM comprising, for example, a battery cell or a battery, and comprises a memory unit MMEM and a controller MCTRL.

[0069] The memory unit MMEM comprises a memory plane PM of memory slots CEL, in addition conventionally decoder rows and columns DECX and DECY, and a write circuit MECR of conventional structure known per se.

[0070] The writing circuit MEC comprises in particular a pulse generator for generating the high voltage pulses MGHV, in particular a ramp generator based eg on an analog integrator, a plurality of charge pump stages, an oscillator, and related regulation.

[0071] This regulation enables control of the output voltage of the charge pump. The oscillator is stopped when the output of the charge pump exceeds the high reference value. The output voltage of the charge pump then starts to decre...

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Abstract

A method of controlling a cycle for writing at least one data item to at least one memory slot of the electrically programmable and erasable read-only memory type disposed in an electronic circuit supplied by a supply voltage includes a controlled increase of the duration of the write cycle in the presence of a decrease in the supply voltage.

Description

[0001] This application claims priority from French application No. 1559017, filed September 24, 2015, which is hereby incorporated by reference. technical field [0002] Embodiments of the present invention and aspects of the embodiments relate to memories, in particular non-volatile memories of the electrically erasable programmable (EEPROM) type, and more particularly to the control of their write cycles. Background technique [0003] A memory slot of the EEPROM type typically includes a transistor with a floating gate allowing storage of data items, a drive gate, a source region, and a drain region. Such a memory tank uses the principle of non-volatile storage of charge on the floating gate of a transistor. [0004] Traditionally, an operation or cycle for writing a data item includes an erase step followed by a programming step. Programming is performed by the Fowler-Nordheim effect, which tunnels electrons from the floating gate to the drain using voltage pulses of hi...

Claims

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Application Information

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IPC IPC(8): G11C16/10G11C16/30G11C16/32
CPCG11C16/10G11C16/30G11C16/32G11C5/144G11C16/14G11C16/3418G11C29/12005G11C29/021G11C29/028G11C13/0069G11C13/0097
Inventor F·塔耶M·巴蒂斯塔
Owner STMICROELECTRONICS (ROUSSET) SAS