Preparation method of grid side walls of power device
A technology of power devices and gate sidewalls, which is applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of poor gate leakage suppression effect and loss, and achieve the effect of improving leakage characteristics and product reliability
Inactive Publication Date: 2017-05-31
ZHUZHOU CRRC TIMES SEMICON CO LTD
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However, in practice, the SiN sidewall will also be lost during the etching process, resulting in poor suppression of gate leakage.
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[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0032] Please refer to Figure 1 to Figure 8 , figure 1 A schematic flow chart of the steps of a specific implementation of the method for preparing the gate sidewall of the power device provided by the embodiment of the present invention; figure 2 It is a schematic structural diagram of a specific embodiment of a power device prepared by using the method for preparing a gate sidewall of a power device provided in an embodiment of the present invention; im...
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The invention discloses a preparation method of grid side walls of a power device. The preparation method comprises steps as follows: step 1, after polysilicon grid etching of a main body of the power device is finished, insulating layers with preset thickness are arranged on the surface of the main body of the power device and side walls of polysilicon grids; step 2, insulation protecting layers are deposited on the insulating layers; step 3, the insulation protecting layers are subjected to whole-surface dry etching, and the insulation protecting layers above the polysilicon grids and between the polysilicon grids are etched thoroughly; step 4, the insulating layers between the polysilicon grids are subjected to whole-surface dry etching. The insulation protecting layers are deposited on the outer sides of the insulating side walls of the grids of the main body of the power device, so that the insulating side walls of the polysilicon grids of the main body of the power device are protected from damage in the dry etching process, larger thickness is reserved, the electric leakage characteristic of the device is improved, and product reliability is improved.
Description
technical field [0001] The invention relates to the technical field of semiconductor device preparation, in particular to a method for preparing gate sidewalls of power devices. Background technique [0002] The material type and thickness of the insulating layer sidewall of the polysilicon gate of the power device are closely related to the device leakage. In the manufacturing process of planar gate power devices (such as IGBT, VDMOS, etc.), after the polysilicon gate is etched, deposition or other methods are generally used to form an insulating layer with a certain thickness on the wafer surface and the sidewall of the polysilicon gate. The insulating layer on the sidewall of the polysilicon gate is called a gate spacer. Next, it is necessary to etch the entire surface to remove the insulating layer on the surface of the wafer between the polysilicon gates and open the window for contacting the electrodes. However, this process method will lose the thickness of the insu...
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IPC IPC(8): H01L21/28H01L29/423
CPCH01L29/401H01L29/42364
Inventor 姚尧杨鑫著文高蒋明明谭真华刘武平李超伟
Owner ZHUZHOU CRRC TIMES SEMICON CO LTD