Method for forming fin field effect transistor

Abstract

A formation method of a fin field-effect transistor comprises the steps of providing a substrate, wherein fin parts are arranged on a surface of the substrate, isolation layers are arranged on the surface of the substrate and cover surfaces of a part of side walls of the fin parts, and surfaces of the isolation layers are lower than surfaces of top parts of the fin parts; forming a dielectric layer at a part of the isolation layers and surfaces of the side walls and the top parts of a part of the fin parts, wherein an opening is formed in the dielectric layer and bridges the fin parts, and the surfaces of the side walls and the top parts of a part of the fin parts are exposed out of the opening; forming a first oxide layer on the surfaces of the side walls and the top parts of the fin parts which are exposed out of the opening by employing an oxidization process; forming a second oxide layer between the first oxide layer and the surfaces of the side walls and the top parts of the fin parts by employing a first annealing process; forming a gate dielectric layer on a surface of the first oxide layer; forming a coverage layer on a surface of the gate dielectric layer; forming a quantum absorption layer between the gate dielectric layer and the coverage layer or on a surface of the coverage layer; performing a second annealing process; and forming a gate layer with which the opening is filled on the surface of the coverage layer. By the formation method, the performance of the formed fin field-effect transistor is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a fin field effect transistor. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits, especially MOS (Metal Oxide Semiconductor, metal-oxide-semiconductor) devices, is continuously reduced to meet the miniaturization and development of integrated circuits. Integration requirements, and transistor devices are one of the important components of MOS devices. [0003] For semiconductor devices, as the size of semiconductor devices continues to shrink, the gate dielectric layer formed of silicon oxide or silicon oxynitride material in the prior art cannot meet the performance requirements of semiconductor devices. In particular, transistors formed with silicon oxide or silicon oxynitride as the gate dielectric layer are prone to a series...

AI Technical Summary

Problems solved by technology

[0005] However, as the size of semiconductor devices shrinks, the disadvantages of transistors composed of high-K gate dielectric layers and metal gates have more and more serious adverse effects on semiconductor devices.

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