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Formation method of fin transistor

A fin transistor and fin technology, which is applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of poor performance and reliability of fin field effect transistors, and achieve improved performance and performance. , the effect of improving performance

Active Publication Date: 2017-09-15
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Application Information

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Problems solved by technology

[0004] However, as the density of semiconductor devices increases and the size shrinks, the performance and reliability of the formed fin field effect transistors deteriorate

Method used

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  • Formation method of fin transistor
  • Formation method of fin transistor
  • Formation method of fin transistor

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Embodiment Construction

[0029] As mentioned in the background, as the density of semiconductor devices increases and the size shrinks, the performance and reliability of the formed fin field effect transistors deteriorate.

[0030] After research, it was found that in order to further reduce the size of the device and increase the density of the device, a high-k metal gate transistor was introduced on the basis of the fin field effect transistor, that is, a high-k dielectric material was used as the gate dielectric layer and a metal material was used as the gate. Moreover, in order to improve the bonding state between the gate dielectric layer of high-K dielectric material and the fin, a gate oxide layer needs to be formed between the gate dielectric layer of high-K dielectric material and the fin for adhesion. The high-K metal gate transistor is formed using a Gate Last process, in which a gate last process is to remove the dummy gate layer of polysilicon and form a gate trench, and then form a gate ...

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Abstract

A formation method of a fin transistor comprises the steps of providing a substrate, wherein the substrate comprises an N-type core area and a P-type core area, and fin parts and isolation layers are arranged on a surface of the substrate; forming first gate oxide layers on surfaces of side walls and top parts of the fin parts on the N-type core area and the P-type core area; forming a pseudo gate layer bridging the fin parts of the N-type core area and the P-type core area on surfaces of the isolation layers and the first gate oxide layers; forming dielectric layers on the isolation layers and the fin parts, wherein a top part of the pseudo gate layer is exposed by the electric layers; removing the pseudo gate layer, forming first grooves in the electrical layer of the N-type core area, and forming second grooves in the electrical layer of the P-type core are; forming second gate oxide layers on surfaces of side walls and top parts of the fin parts, which are exposed, of the N-type core area; forming a first gate structure for filling the first grooves on surfaces of the second gate oxide layer; and forming a second gate structure for filing the second grooves on the surfaces of the first gate oxide layer. The performance of the formed fin transistor is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a fin transistor. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (Fin FET) is proposed in the pri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L29/66795
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP