FPGA-based image scaling processing method and device

Abstract

The invention discloses an FPGA-based image scaling processing method and device. The method comprises: original image data are obtained and the original image data are inputted into an FPGA internal cache at a preset inputting speed; the original image data are read from the internal cache at a reading speed corresponding to the preset inputting speed, interpolation calculation is carried out based on an interpolation algorithm and the read original image data to obtain image interpolation data; and according to the image interpolation data, image data after image scaling are obtained. The original image data are inputted into the FPGA internal cache for caching and thus no external storage device is needed for storage, so that costs can be lowered. Data can be read from the FPGA internal cache instead of being read from any external storage device, so that the data reading speed can be increased and the overall image scaling efficiency can be improved. In addition, the original image data are read from the internal cache at the reading speed corresponding to the preset inputting speed and thus data reading is carried out at a reasonable reading speed, so that the reading speed can be guaranteed and data loss caused by too slow reading speed can be avoided. Therefore, the scaling processing efficiency can be improved.

Description

technical field [0001] The invention relates to the technical field of image processing, in particular to an FPGA-based image scaling processing method and device. Background technique [0002] As the quality of image data becomes higher and higher, image data needs to be scaled. Currently, in the field of image data scaling, there are various scaling algorithms, but in the final analysis, they are all realized by interpolating the original image data. The main Interpolation algorithms include: nearest neighbor interpolation algorithm, bilinear interpolation algorithm and cubic convolution interpolation algorithm. Considering the difficulty of implementing the interpolation algorithm and the final scaling effect, most of the image data scaling currently adopts the bilinear interpolation algorithm. [0003] When using FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) to scale image data through bilinear interpolation algorithm, an external memory, such as S...

AI Technical Summary

Problems solved by technology

[0004] Based on this, it is necessary to address the problems of increased cost and low scaling efficiency, and provide an FPGA-based image scaling processing method and device that reduces cost and improves scaling efficiency

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