FPGA-based image scaling processing method and device

A technology of image scaling and processing method, which is applied in the field of image processing, can solve the problems of increased cost and low scaling efficiency, and achieve the effects of reducing hardware cost, ensuring reading speed, and avoiding data loss

Inactive Publication Date: 2017-06-30
SHENZHEN AIXIESHENG TECH CO LTD
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Based on this, it is necessary to address the problems of increased cost and low scaling efficiency, and provide an FPGA-based image scaling processing method and device that reduces cost and improves scaling efficiency

Method used

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  • FPGA-based image scaling processing method and device
  • FPGA-based image scaling processing method and device
  • FPGA-based image scaling processing method and device

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Embodiment Construction

[0020] see figure 1 An FPGA-based image scaling processing method of an embodiment is provided, comprising the steps of:

[0021] S110: Obtain the original image data, and put the original image data into the FPGA internal cache at a preset input speed.

[0022] The original image refers to the image to be processed. In this embodiment, the image is scaled, that is to say, the original image is the image to be scaled. Since the image is composed of pixels, the original image data refers to the pixels of the original image. value, when the original image needs to be scaled, it is first necessary to obtain the original image data, that is, obtain the pixel value of the original image. In this embodiment, the image scaling process is realized by FPGA. In order to improve the processing speed of FPGA, FPGA puts the original image data into FPGA internal cache, without using external memory for storage, reducing cost. When reading later, directly Reading from the internal cache o...

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Abstract

The invention discloses an FPGA-based image scaling processing method and device. The method comprises: original image data are obtained and the original image data are inputted into an FPGA internal cache at a preset inputting speed; the original image data are read from the internal cache at a reading speed corresponding to the preset inputting speed, interpolation calculation is carried out based on an interpolation algorithm and the read original image data to obtain image interpolation data; and according to the image interpolation data, image data after image scaling are obtained. The original image data are inputted into the FPGA internal cache for caching and thus no external storage device is needed for storage, so that costs can be lowered. Data can be read from the FPGA internal cache instead of being read from any external storage device, so that the data reading speed can be increased and the overall image scaling efficiency can be improved. In addition, the original image data are read from the internal cache at the reading speed corresponding to the preset inputting speed and thus data reading is carried out at a reasonable reading speed, so that the reading speed can be guaranteed and data loss caused by too slow reading speed can be avoided. Therefore, the scaling processing efficiency can be improved.

Description

technical field [0001] The invention relates to the technical field of image processing, in particular to an FPGA-based image scaling processing method and device. Background technique [0002] As the quality of image data becomes higher and higher, image data needs to be scaled. Currently, in the field of image data scaling, there are various scaling algorithms, but in the final analysis, they are all realized by interpolating the original image data. The main Interpolation algorithms include: nearest neighbor interpolation algorithm, bilinear interpolation algorithm and cubic convolution interpolation algorithm. Considering the difficulty of implementing the interpolation algorithm and the final scaling effect, most of the image data scaling currently adopts the bilinear interpolation algorithm. [0003] When using FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) to scale image data through bilinear interpolation algorithm, an external memory, such as S...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T3/40G06T1/00
CPCG06T1/0007G06T3/4023
Inventor 劳可词夏群兵尚庆达廖植文
Owner SHENZHEN AIXIESHENG TECH CO LTD
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