The image scaling memory
system of the present invention eliminates the use of internal or external line memories by using an existing frame memory coupled with an input buffer and a plurality of output buffers for providing a vertical scalar with simultaneous parallel access to multiple lines of data. Additionally, the image scaling memory
system of the present invention, including the frame memory, is embedded into an
integrated circuit. Thus, the image scaling circuit of the present invention improves reliability, lowers cost, and improves
silicon area usage. The frame memory is coupled to an input buffer at an input side and a plurality of output buffers at an output side. The plurality of output buffers is positioned between the frame memory and the vertical scalar. Each output buffer sequentially gains access to and transfers portions of image lines from the frame buffer. Each output buffer stores only a portion of an image line resulting in relatively small output buffers. The plurality of output buffers provides the vertical scalar with simultaneous parallel access to multiple lines of buffered
digital image data. The frame memory preferably comprises
DRAM that stores the image data such that row faults are minimized. The
DRAM frame memory preferably includes at least two memory banks, each including a plurality of rows and a plurality of columns. The
DRAM frame memory has multiple purposes including storing
digital image data frames for
sample rate conversion, as well as, storing bitmaps for access by an
On Screen Display controller and storing
microprocessor data for access by a
microprocessor.