High-precision and low-hardware-complexity sinc interpolation realization method and system

An implementation method and complexity technology, applied in the sinc interpolation implementation method and system field with high precision and low hardware complexity, can solve difficult calculation requirements, low precision and other problems, achieve simplified calculation process, optimize calculation process, and solve calculation efficiency low effect

Active Publication Date: 2017-09-22
NANJING UNIV
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Problems solved by technology

Although the sinc interpolation of some existing parallel structures improves the serial operation efficiency, but because this simple parallel structure only uses the cache method for the convolution kernel coefficients, and does not perform on-site calculations, ...

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  • High-precision and low-hardware-complexity sinc interpolation realization method and system
  • High-precision and low-hardware-complexity sinc interpolation realization method and system
  • High-precision and low-hardware-complexity sinc interpolation realization method and system

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Embodiment Construction

[0034] The present invention will be described in detail below in conjunction with the accompanying drawings and specific implementation methods. In this embodiment, the length of the interpolation kernel is 16 as an example.

[0035] The system for realizing sinc interpolation with high precision and low hardware complexity in this embodiment is mainly composed of a storage unit, a data handling unit and a calculation unit, see figure 1 , figure 2 . The storage unit includes RAM0 for storing sampling point data, RAM1 for storing data of points to be interpolated, and RAM2 for storing result data. The data handling unit includes src1_gen function blocks, src2_gen function blocks, round function blocks and result function blocks. The calculation unit includes general points and A division module, a delay synchronization module and a SIN function calculation module. The src2_gen module takes out the interpolation point data from RAM1, and obtains the integer part and fraction...

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Abstract

The invention provides a high-precision and low-hardware-complexity sinc interpolation realization method and system. The method comprises the steps of storing sampling point data and to-be-interpolated point data in different banks of an RAM; extracting the sampling point data from the RAM according to an integer part of the to-be-interpolated point data; inputting the sampling point data to a calculation unit together with a decimal part of the to-be-interpolated point data; performing reduction-of-fractions-to-a-common-denominator division calculation and SIN calculation; and finally performing multiplication after processing of a delay module to obtain result data, wherein the whole process adopts pipeline design. According to the method and the system, multiple interpolation kernel lengths are supported; floating point complex number calculation is supported; and in a convolution kernel field calculation manner, while the calculation efficiency is ensured, the calculation precision is improved, and the hardware resource overhead is reduced.

Description

technical field [0001] The invention relates to the field of digital signal processing, in particular to a sinc interpolation implementation method and system with high precision and low hardware complexity. Background technique [0002] In digital signal processing, it is sometimes necessary to change the sampling frequency, and interpolation is a method of constructing new data points from discrete known sampled data points. The sampling rate can be increased through interpolation, and this method of directly processing the sequence domain can effectively reduce distortion and quantization error compared to converting it into an analog signal through a digital-to-analog converter and then sampling at another sampling rate. [0003] According to the sampling theorem, in order to restore the analog signal from sampling discrete signal points without distortion, the sampling frequency should not be less than twice the highest frequency in the analog signal spectrum. This is ...

Claims

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Application Information

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IPC IPC(8): G06F17/17
CPCG06F17/17
Inventor 李丽钱昕伟李宏炜潘红兵何书专沙金李伟
Owner NANJING UNIV
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