Fabrication method of semiconductor structure
A manufacturing method and semiconductor technology, which are applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem that the electrical properties of semiconductor devices need to be improved, and achieve good morphology, high width uniformity, and improved electrical properties. Effect
Active Publication Date: 2020-11-27
SEMICON MFG INT (SHANGHAI) CORP +1
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[0006] However, the electrical performance of semiconductor devices formed by the prior art needs to be improved
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[0014] The electrical performance of the semiconductor device in the prior art is poor, and the reason is analyzed in combination with the manufacturing method of the semiconductor structure. refer to Figure 1 to Figure 4 , shows a structural schematic diagram corresponding to each step of a manufacturing method of a semiconductor structure in the prior art. The manufacturing method of described semiconductor structure comprises the following steps:
[0015] refer to figure 1 , forming a semiconductor base, the semiconductor base includes a substrate 100 and fins located on the substrate 100; the substrate 100 includes a first region I and a second region II, and the substrate located in the first region I The fins on the substrate 100 are the first fins 110 , and the fins on the substrate 100 in the second region II are the second fins 120 . The first region I is used to form peripheral devices, and the second region II is used to form core devices.
[0016] Specifically...
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Abstract
A manufacture method of a semiconductor structure includes providing a substrate including a first area and a second area and a fin part disposed on the substrate; forming a first pseudo gate structure including a first pseudo gate electrode layer on the surface of the fin part of the first area and forming a second pseudo gate structure including a second pseudo gate electrode layer on the surface of the fin part of the second area; forming a dielectric layer on the substrate; removing the first pseudo gate electrode layer and the second pseudo electrode layer; forming a first opening and a second opening in the dielectric layer; forming a sacrificial layer on the side wall of the second opening; filling the first opening and the second opening with anti-reflection films; removing the anti-reflection film in the second opening and forming a graphic anti-reflection layer. According to the invention, before the anti-reflection films are filled, the sacrificial layer capable of protecting a material layer on the side wall of the second opening is formed on the side wall of the second opening, so that negative influence on quality of the material layer on the side wall of the second opening due to technique for forming the graphic anti-reflection layer is avoided and the electric property of a semiconductor device is further improved.
Description
technical field [0001] The invention relates to the field of semiconductors, in particular to a method for manufacturing a semiconductor structure. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to adapt to the reduction of feature size, the channel length of MOSFET field effect transistors is also continuously shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur. [0003] Therefore, in order to better adapt to the reduction of feature size, the semic...
Claims
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IPC IPC(8): H01L21/336
CPCH01L29/66795
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP