Method for making pmos tube and nmos tube at the same time, cmos and its manufacturing method, oscillator
A manufacturing method and oscillator technology, which are applied to electric solid state devices, semiconductor devices, electric pulse generator circuits, etc., can solve the problems of limited device size, small-sized device fabrication and uniformity, and reduce process complexity and cost. , low power consumption, good stability
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Embodiment 1
[0048] figure 1 is a schematic structural diagram of a CMOS inverter according to the first embodiment of the present invention.
[0049] refer to figure 1 , the CMOS inverter 100 according to the embodiment of the present invention includes: a substrate 31, a first source 11, a first drain 12, a second source 21, a second drain 22, a first conductive layer 32, a P-type Semiconducting carbon nanotubes 13 , N-type semiconducting carbon nanotubes 23 , a dielectric layer 33 , a first gate 14 , a second gate 24 , and a second conductive layer 34 .
[0050] Wherein, the first source 11 and the first drain 12 and the second source 21 and the second drain 22 are arranged on the substrate 31, and the first drain 12 is adjacent to the second drain 22 . The first conductive layer 32 is disposed between the first drain 12 and the second drain 22; the first conductive layer 32 is respectively connected to the first drain 12 and the second drain twenty two. The P-type semiconducting car...
Embodiment 2
[0063] Figure 6 is a schematic circuit diagram of a CMOS ring oscillator according to a second embodiment of the present invention.
[0064] refer to Figure 6 , the CMOS ring oscillator is a 3-stage ring oscillator, including four CMOS inverters 100 structure as described above in series, and then the output terminal V of the inverter is silvered by aerosol out and input V in connected end to end, and then connect the second source 21 of the four inverters to the power supply terminal V DD connected, all the first drains 12 are electrically connected to the ground terminal GND, and finally the input terminal V of the inverter located at the head end in with the output of the 3rd inverter V out connected to form a CMOS ring oscillator.
[0065] Figure 7 is a performance graph of a CMOS ring oscillator circuit according to a second embodiment of the present invention.
[0066] Depend on Figure 7 It can be seen that the oscillation frequency of the third-order ring os...
Embodiment 3
[0068] According to an embodiment of the present invention, a method for simultaneously manufacturing a PMOS transistor and an NMOS transistor is also provided.
[0069] Figure 8 is a flow chart of a method for simultaneously fabricating a PMOS transistor and an NMOS transistor according to a third embodiment of the present invention.
[0070] Such as Figure 8 As shown, the method for simultaneously manufacturing a PMOS tube and an NMOS tube specifically includes the following operations:
[0071] In operation 110, a first source and a first drain and a second source and a second drain are formed on a substrate; wherein the first drain is adjacent to the second drain.
[0072] In operation 120, a P-type semiconductor carbon nanotube is formed between the first source and the first drain, and an N-type semiconductor is formed between the second source and the second drain. carbon nanotubes.
[0073] In operation 130, the first source, the first drain, the second source, t...
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Abstract
Description
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Application Information
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