Manufacture method for stacked packaging device
A technology of packaging device and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor/solid-state device testing/measurement, etc., and can solve the problems of shrinking feature size and unsatisfactory packaging technology, etc.
Inactive Publication Date: 2017-11-10
TAIWAN SEMICON MFG CO LTD
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Problems solved by technology
However, as feature sizes continue to shrink, known packaging techniques are not fully satisfactory in many respects
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[0011] The following disclosure provides many different embodiments, or examples, for implementing different features of the presented subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these examples are examples only and are not intended to be limiting. For example, in the following description, forming a first feature over or on a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where the first and second features may be formed in direct contact. An embodiment where additional features are formed between features such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat element symbols and / or letters in each example. This repetition is for the purposes of brevity and clarity and does not in itself indicate a relationship between the various embodi...
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A manufacture method for a stacked packaging device includes the following operations: (i) receiving a precursor package including a precursor substrate and a plurality of semiconductor packages on the precursor substrate, in which a gap is presented between the precursor substrate and each of the semiconductor packages; (ii) forming underfill material filling the gaps; (iii) cutting the precursor substrate along a region between adjacent ones of the semiconductor packages to form a plurality of discrete stacked packaging devices; and (iv) applying supplemental underfill material to one of the package-on-package devices.
Description
technical field [0001] This specification relates to a package-on-package structure and a method of manufacturing a package-on-package device. Background technique [0002] The semiconductor integrated circuit (integrated circuit; IC) industry has experienced rapid development. Technological advances in IC manufacturing have produced several generations of ICs, with each generation producing smaller and more complex circuits than the previous generation. Various types of semiconductor devices performing different functions are integrated and packaged into a single component or package. With demands for miniaturization, higher speed and lower power consumption, there has been a demand for smaller packaging techniques for semiconductor die. However, as feature sizes continue to shrink, known packaging techniques have in many ways been less than fully satisfactory. Contents of the invention [0003] According to an aspect of some embodiments, a method of manufacturing a pa...
Claims
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IPC IPC(8): H01L21/56
CPCH01L21/56H01L21/561H01L21/563H01L24/48H01L25/105H01L2225/1035H01L2225/1058H01L2224/32225H01L2224/73204H01L2224/92125H01L2924/00014H01L2224/16225H01L2924/15311H01L2224/18H01L2924/1431H01L2224/13147H01L2224/13139H01L2224/13111H01L2924/1436H01L24/32H01L2924/14H01L24/27H01L24/75H01L2224/75983H01L24/83H01L24/13H01L24/29H01L24/73H01L24/16H01L2224/45099H01L2924/00012H01L2924/00H01L21/78H01L22/20H01L23/3142H01L23/481H01L24/17H01L24/49H01L25/0657H01L25/50H01L2224/48091H01L2224/48106H01L2224/48227H01L2225/0651H01L2225/06517H01L2225/0652H01L2225/06548H01L2924/01022H01L2924/01024H01L2924/01028H01L2924/01029H01L2924/01047H01L2924/0105H01L2924/01074
Inventor 陈英儒陈潔陈宪伟
Owner TAIWAN SEMICON MFG CO LTD