Synchronous clock circuit with the same source

Abstract

The invention discloses a synchronous clock circuit with the same source. Multiple synchronous clock signals with the same source, which are suitable for a high-speed circuit, are generated on the basis of an active crystal oscillator, clock frequency dividers and clock generators. The active crystal oscillator serving as a clock source is formed by a crystal resonator and an oscillation circuit. Fixed-frequency clock signals generated by the active crystal oscillator serve as a clock source in an entire module. One clock frequency divider generates multiple synchronous low frequency clock signals with the same frequency on the basis of the clock source. The above low frequency clock signals can directly be used as a system clock of processors in the module. One clock generator takes one of the low frequency clock signals as a reference clock to generate multiple high frequency clock signals. The high frequency clock signals can serve as a reference clock for working of high speed interfaces of the high-performance processors, and also can serve as an input clock of one high speed clock frequency divider. In this way, clock synchronization with the same source in the module can be realized, and the problem of the many types and the excessive number of crystal oscillators of a conventional synchronous clock circuit with the same source as well as the problem of synchronization and the same source during data interaction and communication among high speed buses are overcome.

Description

technical field [0001] The invention belongs to the technical field of high-speed digital circuits, and more specifically relates to a homologous synchronous clock circuit. Background technique [0002] In the design of high-speed digital circuits, the clock circuit in the module is the basis for the normal operation of the processor. The stability and consistency of the clock directly affect the performance of the processor's work and data interaction of the communication interface. The traditional digital clock circuit is mainly designed based on the clock requirement of a single processor, which mainly has the following disadvantages: [0003] (1) There is no independent clock source in the clock circuit, and the multi-processor clocks in the module are independent, which makes it difficult to meet the clock design requirements of complex circuits; [0004] (2) The number and types of active crystal oscillators or passive crystals used are large, and it is difficult to m...

AI Technical Summary

Problems solved by technology

[0003] (1) There is no independent clock source in the clock circuit, and the multi-processor clocks in the module are independent, which makes it difficult to meet the clock design requirements of complex circuits;

[0004] (2) The number and types of active crystal oscillators or passive crystals used are large, and it is difficult to meet the synchronization requirements due to device differences; and due to the use of more crystals and crystal oscillators, it increases the difficulty of complex circuits in PCB layout and wiring

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